The Community for Technology Leaders
Parallel Computing in Electrical Engineering, 2004. International Conference on (2006)
Bialystok, Poland
Sept. 13, 2006 to Sept. 17, 2006
ISBN: 0-7695-2554-7
pp: 337-342
Amin Farmahini Farahani , University of Tehran, Iran
Mehdi Kamal , Sharif University of Technology, Iran
Mehdi Salmani-Jelodar , University of Tehran, Iran
Hardware/Software (HW/SW) partitioning plays one of the most important roles in Co-design of embedded systems that is due to made at the beginning of the cycle of the design. The ultimate designed system?s performance strongly depends on partitioning. Therefore, achieving the optimum solutions can reduced the systems cost and delay. On the other hand, Genetic algorithms (GAs) are powerful function optimizers that are used successfully to solve problems in many different disciplines. Parallel GAs (PGAs) are particularly easy to implement and promise substantial gains in performance and results. In this paper, we present a PGA-based approach to achieve near optimal solutions for HW/SW partitioning problem. To evaluate the proposed system, we have used Task Graphs For Free (TGFF) tool which is used widely in the literature. The experimental results show that the proposed approach finds the near optimal cost solutions in acceptable time. The achieved results also show that the proposed system main capability is in mapping large scale task graphs to HW or SW.

M. Kamal, A. F. Farahani and M. Salmani-Jelodar, "Parallel-Genetic-Algorithm-Based HW/SW Partitioning," International Symposium on Parallel Computing in Electrical Engineering(PARELEC), Bialystok, 2006, pp. 337-342.
90 ms
(Ver 3.3 (11022016))