Parallel Computing in Electrical Engineering, 2004. International Conference on (2006)
Sept. 13, 2006 to Sept. 17, 2006
F. Safaei , IPM School of Computer Science, Iran
A. Khonsari , University of Tehran, Tehran, Iran
M. Fathy , Iran University of Science and Technology, Iran
N. Alzeidi , University of Glasgow, UK
M. Ould-Khaoua , University of Glasgow, UK
Circuit Switching (CS) has been suggested as an efficient switching method for supporting simultaneous communications (such as data, voice, and images) across parallel systems due to its ability to preserve both communication performance and fault-tolerant demands in such systems. In this paper we present an efficient scheme to capture the mean message latency in 2-D torus with CS in the presence of faulty components. We have also conducted extensive simulation experiments, the results of which are used to validate the analytical model.
M. Ould-Khaoua, N. Alzeidi, F. Safaei, M. Fathy and A. Khonsari, "Performance Modeling of Fault-Tolerant Circuit-Switched Communication Networks," International Symposium on Parallel Computing in Electrical Engineering(PARELEC), Bialystok, 2006, pp. 239-244.