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Parallel Computing in Electrical Engineering, 2004. International Conference on (2006)
Bialystok, Poland
Sept. 13, 2006 to Sept. 17, 2006
ISBN: 0-7695-2554-7
pp: 127-133
Jiri Jaros , Brno University of Technology, Czech Republic
Milos Ohl?dal , Brno University of Technology, Czech Republic
V?clav Dvor? , Brno University of Technology, Czech Republic
The paper addresses the important issue related to communication performance of Networks on Chip (NoCs), namely the complexity of collective communications measured by a required number of algorithmic steps. Three NoC topologies are investigated, a ring network, Octagon and 2D-mesh, due to their easy manufacturability on a chip. The lower complexity bounds are compared to real values obtained by evolution-based optimizing tools. Results give hints on what communication overhead is to be expected in ring- and mesh-based NoCs with the wormhole switching, full duplex links and k-port noncombining nodes.

J. Jaros, M. Ohl?dal and V. Dvor?, "Complexity of Collective Communications on NoCs," International Symposium on Parallel Computing in Electrical Engineering(PARELEC), Bialystok, 2006, pp. 127-133.
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