Parallel Computing in Electrical Engineering, 2004. International Conference on (2004)
Sept. 7, 2004 to Sept. 10, 2004
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/PCEE.2004.17
J. P. Robelly , Dresden University of Technology, Germany
G. Cichon , Dresden University of Technology, Germany
H. Seidel , Dresden University of Technology, Germany
G. Fettweis , Dresden University of Technology, Germany
Driven by the ever increasing algorithm complexity on the field of mobile communications systems, SIMD DSP architectures have emerged as an approach that offers the necessary processing power at reasonable levels of die size and power consumption. However, this kind of DSP architectures imposes new challenges for programmers, since algorithms have to be designed to exploit the available parallelism on the processor. Taking as a starting point an algebraic framework that captures the SIMD computational model, we report in this paper about our efforts to design and automatically generate object code for our family of DSP architectures independent of the available SIMD parallelism. We show how these algebraic structures can be used as a high level programming language that offers a unified approach to design and describe algorithms using SIMD parallelism. Moreover, we show how these algebraic structures offer concise rules for the automatic code generation.
J. P. Robelly, G. Fettweis, G. Cichon and H. Seidel, "Automatic Code Generation for SIMD DSP Architectures: An Algebraic Approach," Parallel Computing in Electrical Engineering, 2004. International Conference on(PARELEC), Dresden, Germany, 2004, pp. 372-375.