Parallel Computing in Electrical Engineering, 2004. International Conference on (2004)
Sept. 7, 2004 to Sept. 10, 2004
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/PCEE.2004.15
Anna Nepomniaschaya , Institute of Computational Mathematics and Mathematical Geophysics, Russia
Zbigniew Kokosinski , Cracow University of Technology, Poland
In this paper a model of a versatile associative graph processor called AGP is proposed. The model can work both in bit-serial and in bit-parallel mode and enables simultaneous search for a set of comparands and selection of the search types. In addition it has some built-in operations designed for associative graph algorithms. The selected functions and basic procedures of this model are described and its possible architecture is discussed.
associative parallel processor, bit-parallel processing, associative graph processing, multiple-search
A. Nepomniaschaya and Z. Kokosinski, "Associative Graph Processor and Its Properties," Parallel Computing in Electrical Engineering, 2004. International Conference on(PARELEC), Dresden, Germany, 2004, pp. 297-302.