Parallel Computing in Electrical Engineering, 2004. International Conference on (2004)
Sept. 7, 2004 to Sept. 10, 2004
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/PCEE.2004.30
Andreas K? , Darmstadt University of Technology
Sorin A. Huss , Darmstadt University of Technology
The focus of this paper is to establish a link of dynamic structures as found in software-based systems function descriptions to hardware implementations. Specific properties of object-oriented software methodologies and partially reconfigurable FPGAs are first analyzed. Then, both a reconfigurable processing unit and an approach how to map object classes to such execution units are elaborated. The feasibility of the proposed mapping method is demonstrated for some application examples.
S. A. Huss and A. K?, "Dynamically Reconfigurable Hardware for Object-Oriented Processing," Parallel Computing in Electrical Engineering, 2004. International Conference on(PARELEC), Dresden, Germany, 2004, pp. 181-186.