Parallel Computing in Electrical Engineering, 2004. International Conference on (2004)
Sept. 7, 2004 to Sept. 10, 2004
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/PCEE.2004.25
Christian Sauer , Infineon Technologies, Munich, Germany
Matthias Gries , University of California, Berkeley
Jose Ignacio Gomez , Universidad Complutense de Madrid, Spain
Scott Weber , University of California, Berkeley
Kurt Keutzer , University of California, Berkeley
In communication centric application domains flexible interfaces are required to support the variety of recently emerged and still evolving high-speed serial interconnect standards. To develop such interfaces, typical application scenarios have to be identified, and common functionality and specific characteristics of the selected standards need to be analyzed. The results of this analysis can then guide the exploration of the design space. In this paper, we present a methodology which is tailored to the characteristics of serial interconnects. We use Click models for analysis and abstraction of the communication protocols and explore flexible interfaces within a cycle-accurate architecture development framework. Our results show the feasibility of implementing a flexible interface on a packet engine similar to those used in network processors. Based on our findings, we believe that flexible interfaces will form a new family of building blocks for future Systems-on-Chip.
J. I. Gomez, K. Keutzer, C. Sauer, M. Gries and S. Weber, "Developing a Flexible Interface for RapidIO, Hypertransport, and PCI-Express," Parallel Computing in Electrical Engineering, 2004. International Conference on(PARELEC), Dresden, Germany, 2004, pp. 129-134.