International Conference on Parallel Computing in Electrical Engineering (PARELEC'02) (2002)
Sept. 22, 2002 to Sept. 25, 2002
Valeriy N. Koval , National Academy of Sciences of Ukraine
Oleg N. Bulavenko , National Academy of Sciences of Ukraine
Zinoviy L. Rabinovich , National Academy of Sciences of Ukraine
The paper considers the creation of intelligent solving machines and the arrangement of parallel programming in intelligent distributed multiprocessor systems based on those. There are proposed some main concepts. A system is designed for programming in the C+Graph high-level language. C+Graph provides an efficient operation with knowledge (complicated data structures) and centralized-decentralized control exercised in virtually distributed computation space. Parallel C+Graph programming model is based on a model used for multiple-flow monoprocessor programming of the basic Java language. The model operates in a virtual C+Graph machine network. The ideology proposed can be considered as an efficient development of structural high-level language interpretation when applied to multi-microprocessor systems. Equipment structure of the basic version of intelligent solving machines is considered and some characteristics are discussed.
V. N. Koval, Z. L. Rabinovich and O. N. Bulavenko, "Parallel Architectures and Their Development on the Basis of Intelligent Solving Machines," International Conference on Parallel Computing in Electrical Engineering (PARELEC'02)(PARELEC), Warsaw, Poland, 2002, pp. 21.