International Conference on Parallel Computing in Electrical Engineering (PARELEC'00) (2000)
Aug. 27, 2000 to Aug. 30, 2000
Anatoly Prihozhy , Belarusian State Polytechnical Academy
Redouane Merdjani , Belarusian State Polytechnical Academy
Fuad Iskandar , Belarusian State Polytechnical Academy
This paper presents a formal model, VHDL-model, techniques, and software for automatic parallelization of algorithms executed on an asynchronous network. The level of net algorithm concurrency is defined by a set of concurrent operation and variable pairs. The techniques and software target asynchronous high and system level synthesis and optimization of information processing in computer networks.
R. Merdjani, A. Prihozhy and F. Iskandar, "Automatic Parallelization of Net Algorithms," International Conference on Parallel Computing in Electrical Engineering (PARELEC'00)(PARELEC), Quebec, Canada, 2000, pp. 24.