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2011 IEEE Workshop on Principles of Advanced and Distributed Simulation (2011)
Nice, France
June 14, 2011 to June 17, 2011
ISBN: 978-1-4577-1363-7
pp: 1-9
The current trend in processor architecture design is the integration of multiple cores on a single processor. This trend has shifted the burden of improving program execution speed from chip manufacturers to software developers. Thus, in the software domain, one of the research focuses is on modifying software platforms to efficiently utilize the computation resources of multi-core processors. In this paper, we propose a global schedule mechanism based on a distributed event queue to improve the performance of Time Warp system on multi-core systems and give some experiences on the implementation of the shared attribute/state access mechanism based on transactional space-time memory. Furthermore, this paper comprehensively explores how the different design choices and techniques affect the performance of Time Warp system on a multi-core platform by various experiments. Compared with the distributed event queue local schedule mechanism, the experiment results show that the distributed queue global schedule mechanism can effectively decrease rollback rate and balance the workloads at a low event scheduling cost for Time Warp system on multi-core platforms; the STM-based shared attribute access mechanism prominently outperforms the conventional "pull" mechanism on multi-core platforms.

L. Chen, L. Wu, S. Peng, Y. Lu and Y. Yao, "A Well-Balanced Time Warp System on Multi-Core Environments," 2011 IEEE Workshop on Principles of Advanced and Distributed Simulation(PADS), Nice, France, 2011, pp. 1-9.
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