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Proceedings Thirteenth Workshop on Parallel and Distributed Simulation. PADS 99. (Cat. No.PR00155) (1999)
Atlanta, Georgia
May 1, 1999 to May 4, 1999
ISSN: 1087-4097
ISBN: 0-7695-0155-9
pp: 148
ABSTRACT
We have developed a set of performance prediction tools which help to estimate the achievable speedups from parallelizing a sequential simulation. The tools focus on two important factors in the actual speedup of a parallel simulation program : (a) the simulation protocol used, and (b) the inherent parallelism in the simulation model. The first two tools are a performance/parallelism analyzer for a conservative, asynchronous simulation protocol, and a similar analyzer for a conservative, synchronous ("super-step") protocol. Each analyzer allows us to study how the speedup of a model changes with increasing number of processors, when a specific protocol is used. The third tool -- a critical path analyzer -- gives an ideal upper bound to the model's speedup. This paper gives an overview of the prediction tools, and reports the predictions from applying the tools to a discrete-event wafer fabrication simulation model. The predictions are close to speedups from actual parallel implementations. These tools help us to set realistic expectations of the speedup from a parallel simulation program, and to focus our work on issues which are more likely to yield performance improvement.
INDEX TERMS
CITATION

S. Y. Huang et al., "Performance Prediction Tools for Parallel Discrete-Event Simulation," Proceedings Thirteenth Workshop on Parallel and Distributed Simulation. PADS 99. (Cat. No.PR00155)(PADS), Atlanta, Georgia, 1999, pp. 148.
doi:10.1109/PADS.1999.766171
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