The Community for Technology Leaders
Proceedings 9th Workshop on Parallel and Distributed Simulation (ACM/IEEE) (1995)
Lake Placid, New York
June 14, 1995 to June 16, 1995
ISBN: 0-8186-7120-3
pp: 181
P. Konas , Silicon Graphics In., Mountain View, CA, USA
Pen-Chung Yew , Silicon Graphics In., Mountain View, CA, USA
ABSTRACT
A new partitioning method for synchronous PDES simulations is proposed. The method exploits characteristics of both the simulation method and of the application domain to arrive at efficient partitionings. A performance study shows that the method outperforms existing partitioning methods in terms of four different performance metrics.
INDEX TERMS
logic partitioning; logic CAD; digital simulation; circuit analysis computing; partitioning method; synchronous PDES simulations; parallel simulation; partitioning methods; performance metrics; performance study
CITATION

P. Konas and P. Yew, "Partitioning for synchronous parallel simulation," Proceedings 9th Workshop on Parallel and Distributed Simulation (ACM/IEEE)(PADS), Lake Placid, New York, 1995, pp. 181.
doi:10.1109/PADS.1995.404301
94 ms
(Ver 3.3 (11022016))