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2014 23rd International Conference on Parallel Architecture and Compilation (PACT) (2014)
Edmonton, Canada
Aug. 23, 2014 to Aug. 27, 2014
ISBN: 978-1-5090-6607-0
pp: 479-480
Deepak Majeti , Rice University
Kuldeep S. Meel , Rice University
Rajkishore Barik , Intel Labs
Vivek Sarkar , Rice University
ABSTRACT
Data layouts play a crucial role in determining the performance of a given application running on a given architecture. Existing parallel programming frameworks for both multicore and heterogeneous systems leave the onus of selecting a data layout to the programmer. Therefore, shifting the burden of data layout selection to optimizing compilers can greatly enhance programmer productivity and application performance. In this work, we introduce ADHA: a two-level hierarchal formulation of the data layout problem for modern heterogeneous architectures. We have created a reference implementation of ADHA in the Heterogeneous Habanero-C (H2C) parallel programming system. ADHA shows significant performance benefits of up to 6.92× compared to manually specified layouts for two benchmark programs running on a CPU+GPU heterogeneous platform.
INDEX TERMS
Layout, Graphics processing units, Benchmark testing, Kernel, Computer architecture, Biomedical imaging,Heterogeneous Architectures, Compilers, Data Layout
CITATION
Deepak Majeti, Kuldeep S. Meel, Rajkishore Barik, Vivek Sarkar, "ADHA: Automatic data layout framework for heterogeneous architectures", 2014 23rd International Conference on Parallel Architecture and Compilation (PACT), vol. 00, no. , pp. 479-480, 2014, doi:10.1145/2628071.2628122
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