2014 23rd International Conference on Parallel Architecture and Compilation (PACT) (2014)
Aug. 23, 2014 to Aug. 27, 2014
Alexandros-Herodotos Haritatos , School of ECE, NTUA
Georgios Goumas , School of ECE, NTUA
Nikos Anastopoulos , School of ECE, NTUA
Konstantinos Nikas , School of ECE, NTUA
Kornilios Kourtis , Dept. of Computer Science, ETH
Nectarios Koziris , School of ECE, NTUA
This paper presents LCA, a memory Link and Cache-Aware co-scheduling approach for CMPs. It is based on a novel application classification scheme that monitors resource utilization across the entire memory hierarchy from main memory down to CPU cores. This enables us to predict application interference accurately and support a co-scheduling algorithm that outperforms state-of-the-art scheduling policies both in terms of throughput and fairness. As LCA depends on information collected at runtime by existing monitoring mechanisms of modern processors, it can be easily incorporated in real-life co-scheduling scenarios with various application features and platform configurations.
Interference, Bandwidth, Multicore processing, Processor scheduling, Runtime, Throughput, Program processors
A. Haritatos, G. Goumas, N. Anastopoulos, K. Nikas, K. Kourtis and N. Koziris, "LCA: A memory link and cache-aware co-scheduling approach for CMPs," 2014 23rd International Conference on Parallel Architecture and Compilation (PACT), Edmonton, Canada, 2014, pp. 469-470.