2014 23rd International Conference on Parallel Architecture and Compilation (PACT) (2014)
Aug. 23, 2014 to Aug. 27, 2014
Uday Bondhugula , Department of Computer Science and Automation, Indian Institute of Science, Bangalore 560012 India
Vinayaka Bandishti , Department of Computer Science and Automation, Indian Institute of Science, Bangalore 560012 India
Albert Cohen , INRIA and École Normale, Supérieure, 45 rue d'Ulm, Paris 75005, France
Guillain Potron , École Normale Supérieure and Indian Institute of Science, 45 rue d'Ulm, Paris 75005, France
Nicolas Vasilache , Reservoir Labs, 632 Broadway, New York, NY 10012, USA
This paper deals with optimizing time-iterated computations on periodic data domains. These computations are prevalent in computational sciences, particularly in partial differential equation solvers. We propose a fully automatic technique suitable for implementation in a compiler or in a domain-specific code generator for such computations. Dependence patterns on periodic data domains prevent existing algorithms from finding tiling opportunities. Our approach augments a state-of-the-art parallelization and locality-enhancing algorithm from the polyhedral framework to allow time-tiling of stencil computations on periodic domains. Experimental results on the swim SPEC CPU2000fp benchmark show a speedup of 5× and 4.2× over the highest SPEC performance achieved by native compilers on Intel Xeon and AMD Opteron multicore SMP systems, respectively. On other representative stencil computations, our scheme provides performance similar to that achieved with no periodicity, and a very high speedup is obtained over the native compiler. We also report a mean speedup of about 1.5 χ over a domain-specific stencil compiler supporting limited cases of periodic boundary conditions. To the best of our knowledge, it has been infeasible to manually reproduce such optimizations on swim or any other periodic stencil, especially on a data grid of two-dimensions or higher.
Computational modeling, Mathematical model, Benchmark testing, Boundary conditions, Parallel processing, Memory management, Bandwidth
U. Bondhugula, V. Bandishti, A. Cohen, G. Potron and N. Vasilache, "Tiling and optimizing time-iterated computations over periodic domains," 2014 23rd International Conference on Parallel Architecture and Compilation (PACT), Edmonton, Canada, 2014, pp. 39-50.