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2014 23rd International Conference on Parallel Architecture and Compilation (PACT) (2014)
Edmonton, Canada
Aug. 23, 2014 to Aug. 27, 2014
ISBN: 978-1-5090-6607-0
pp: 15-26
Jennifer B. Sartor , Ghent University, Belgium
Wim Heirman , Intel ExaScience Lab, Belgium
Stephen M. Blackburn , Australian National University, Australia
Lieven Eeckhout , Ghent University, Belgium
Kathryn S. McKinley , Microsoft Research, Washington, USA
Managing the limited resources of power and memory bandwidth while improving performance on multicore hardware is challenging. In particular, more cores demand more memory bandwidth, and multi-threaded applications increasingly stress memory systems, leading to more energy consumption. However, we demonstrate that not all memory traffic is necessary. For modern Java programs, 10 to 60% of DRAM writes are useless, because the data on these lines are dead — the program is guaranteed to never read them again. Furthermore, reading memory only to immediately zero initialize it wastes bandwidth. We propose a software/hardware cooperative solution: the memory manager communicates dead and zero lines with cache scrubbing instructions. We show how scrubbing instructions satisfy MESI cache coherence protocol invariants and demonstrate them in a Java Virtual Machine and multicore simulator. Scrubbing reduces average DRAM traffic by 59%, total DRAM energy by 14%, and dynamic DRAM energy by 57% on a range of configurations. Cooperative software/hardware cache scrubbing reduces memory bandwidth and improves energy efficiency, two critical problems in modern systems.
Bandwidth, Multicore processing, Resource management, Memory management, Hardware, Java, Random access memory

J. B. Sartor, W. Heirman, S. M. Blackburn, L. Eeckhout and K. S. McKinley, "Cooperative cache scrubbing," 2014 23rd International Conference on Parallel Architecture and Compilation (PACT), Edmonton, Canada, 2014, pp. 15-26.
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