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Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques (2013)
Edinburgh, United Kingdom United Kingdom
Sept. 7, 2013 to Sept. 11, 2013
ISSN: 1089-795X
ISBN: 978-1-4799-1018-2
pp: 113-122
Miao Zhou , Dept. of Comput. Sci., Univ. of Pittsburgh, Pittsburgh, PA, USA
Yu Du , Dept. of Comput. Sci., Univ. of Pittsburgh, Pittsburgh, PA, USA
Bruce R. Childers , Dept. of Comput. Sci., Univ. of Pittsburgh, Pittsburgh, PA, USA
Rami Melhem , Dept. of Comput. Sci., Univ. of Pittsburgh, Pittsburgh, PA, USA
Daniel Mosse , Dept. of Comput. Sci., Univ. of Pittsburgh, Pittsburgh, PA, USA
ABSTRACT
Phase-Change Memory (PCM) has emerged as a promising low-power candidate to replace DRAM in main memory. Hybrid memory architecture comprised of a large PCM and a small DRAM is a popular solution to mitigate undesirable characteristics of PCM writes. Because PCM writes are much slower than reads, writebacks from the last-level cache consume a large portion of memory bandwidth, and thus, impact performance. Effectively utilizing shared resources, such as the last-level cache and the memory bandwidth, is crucial to achieving high performance for multi-core systems. Although existing memory bandwidth allocation schemes improve system performance, no current approach uses writeback information to partition bandwidth for hybrid memory. We use a writeback-aware analytic model to derive the allocation strategy for bandwidth partitioning of phase-change memory. From the derivation of the model, Writeback-aware Bandwidth Partitioning (WBP) is proposed as a new runtime mechanism to partition PCM service cycles among applications. WBP uses a partitioning weight to indicate the importance of writebacks (in addition to LLC misses) to bandwidth allocation. A companion Dynamic Weight Adjustment (DWA) scheme dynamically selects the partitioning weight to maximize system performance. Simulation results show that WBP and DWA improve performance by 24.9% (weighted speedup) over bandwidth partitioning schemes that do not take writebacks into consideration in a 8-core system.
INDEX TERMS
Bandwidth, Phase change materials, Random access memory, Performance evaluation, Delays, Equations, System performance,stream programming, irregular programs, load balancing, scheduling, software pipelining
CITATION
Miao Zhou, Yu Du, Bruce R. Childers, Rami Melhem, Daniel Mosse, "DANBI: dynamic scheduling of irregular stream programs for many-core systems", Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques, vol. 00, no. , pp. 113-122, 2013, doi:10.1109/PACT.2013.6618809
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