2012 21st International Conference on Parallel Architectures and Compilation Techniques (PACT) (2012)
Minneapolis, MN, USA
Sept. 19, 2012 to Sept. 23, 2012
DOI Bookmark: http://doi.ieeecomputersociety.org/
Bin Ren , Dept. of Computer Science and Engineering, The Ohio State University, USA
Gagan Agrawal , Dept. of Computer Science and Engineering, The Ohio State University, USA
James R. Larus , Microsoft Research, USA
Todd Mytkowicz , Microsoft Research, USA
Tomi Poutanen , Microsoft Research, USA
Wolfram Schulte , Microsoft Research, USA
Fine-grain data parallelism is increasingly common in mainstream processors in the form of long vectors and on-chip GPUs. This paper develops compiler and runtime support to exploit such data parallelism for non-numeric, non-graphic, irregular parallel tasks that perform simple computations while traversing many independent, irregular data structures, like trees and graphs. We vectorize the traversal of trees and graphs by treating a set of irregular data structures as a parallel control-flow graph and compiling the traversal into a domain-specific bytecodes. We produce a SIMD interpreter for these bytecodes, so each lane of a SIMD unit traverses one irregular data structure. Despite the overhead of interpretation, we demonstrate significant increases in single-core performance over optimized baselines.
Data structures, Vegetation, Layout, Parallel processing, Virtual machining, Bars, Program processors
B. Ren, G. Agrawal, J. R. Larus, T. Mytkowicz, T. Poutanen and W. Schulte, "Fine-grained parallel traversals of irregular data structures," 2012 21st International Conference on Parallel Architectures and Compilation Techniques (PACT), Minneapolis, MN, USA, 2012, pp. 461-462.