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2012 21st International Conference on Parallel Architectures and Compilation Techniques (PACT) (2012)
Minneapolis, MN, USA
Sept. 19, 2012 to Sept. 23, 2012
ISBN: 978-1-5090-6609-4
pp: 315-324
Lingda Li , Microprocessor Research and Development Center, Peking University, Beijing, China
Dong Tong , Microprocessor Research and Development Center, Peking University, Beijing, China
Zichao Xie , Microprocessor Research and Development Center, Peking University, Beijing, China
Junlin Lu , Microprocessor Research and Development Center, Peking University, Beijing, China
Xu Cheng , Microprocessor Research and Development Center, Peking University, Beijing, China
ABSTRACT
In the last-level cache, large amounts of blocks have reuse distances greater than the available cache capacity. Cache performance and efficiency can be improved if some subset of these distant reuse blocks can reside in the cache longer. The bypass technique is an effective and attractive solution that prevents the insertion of harmful blocks.
INDEX TERMS
Radiation detectors, Monitoring, Proposals, Hardware, Optimized production technology, Prefetching, Space exploration,Last-level Cache, Optimal Bypass, Replacement
CITATION
Lingda Li, Dong Tong, Zichao Xie, Junlin Lu, Xu Cheng, "Optimal bypass monitor for high performance last-level caches", 2012 21st International Conference on Parallel Architectures and Compilation Techniques (PACT), vol. 00, no. , pp. 315-324, 2012, doi:
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