2012 21st International Conference on Parallel Architectures and Compilation Techniques (PACT) (2012)
Minneapolis, MN, USA
Sept. 19, 2012 to Sept. 23, 2012
DOI Bookmark: http://doi.ieeecomputersociety.org/
Kathy Yelick , University of California at Berkeley, Lawrence Berkeley National Laboratory, USA
Future computing system designs will be constrained by power density and total system energy, and will require new programming models and implementation strategies. Data movement in the memory system and interconnect will dominate running time and energy costs, making communication cost reduction the primary optimization criteria for compilers. Communication cost can be divided into latency costs, which are per communication event, and bandwidth costs, which grow with total communication volume.
Bandwidth, Programming, System analysis and design, Density measurement, Power system measurements, Computational modeling, Optimization,Bandwidth, Compiler, Communication, Autotuning, Latency
Kathy Yelick, "Compiling to avoid communication", 2012 21st International Conference on Parallel Architectures and Compilation Techniques (PACT), vol. 00, no. , pp. 157, 2012, doi: