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2011 International Conference on Parallel Architectures and Compilation Techniques (2011)
Galveston, Texas USA
Oct. 10, 2011 to Oct. 14, 2011
ISSN: 1089-795X
ISBN: 978-0-7695-4566-0
pp: 193-194
ABSTRACT
We attempt to provide an architectural support for fast and efficient bounds checking for multithread work-loads in chip-multiprocessor (CMP) environments. Bounds information sharing and smart tagging help to perform bounds checking more effectively utilizing the characteristics of a pointer. Also, the BCache architecture allows fast access to the bounds information. Simulation results show that the proposed scheme increases ¥ìPC of memory operations by 29% on average compared to the previous hardware scheme.
INDEX TERMS
architecture, chip-multiprocessor, security, memory attacks, bounds checking
CITATION

B. S. An, E. J. Kim and K. H. Yum, "Scalable and Efficient Bounds Checking for Large-Scale CMP Environments," 2011 International Conference on Parallel Architectures and Compilation Techniques(PACT), Galveston, Texas USA, 2011, pp. 193-194.
doi:10.1109/PACT.2011.36
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