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Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques (2011)
Galveston, Texas USA
Oct. 10, 2011 to Oct. 14, 2011
ISSN: 1089-795X
ISBN: 978-0-7695-4566-0
pp: 169-170
ABSTRACT
Multimedia Instruction Sets have been introduced more than 20 years ago to speedup multimedia processing on General Purpose Processors. However, to take advantage of these instructions, developers have to cope with the low-level assembly or the equivalent C interfaces, which hinders code portability and raises development cost increases. An alternative is to let the compiler automatically generate optimized versions: ICC generates relatively efficient code for its supported platforms but does not target other processors. On the other hand, GCC targets a wide range of devices but generates less efficient code. In this paper, we present a retargetable compiler infrastructure for SIMD architectures based on three key points: a generic Multimedia Instruction Set, the combination of loop vectorization transformations with Super-word Level Parallelism and memory transfer optimizations. Three compilers, for SSE, AVX and NEON have been built using this common infrastructure.
INDEX TERMS
sse, avx, neon, simd, source-to-source, compiler
CITATION
Adrien Guinet, Ronan Keryell, Serge Guelton, "Building Retargetable and Efficient Compilers for Multimedia Instruction Sets", Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques, vol. 00, no. , pp. 169-170, 2011, doi:10.1109/PACT.2011.23
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