2010 19th International Conference on Parallel Architectures and Compilation Techniques (PACT) (2010)
Sept. 11, 2010 to Sept. 15, 2010
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Samira Khan , Univ. of Texas at San Antonio, USA
Doug Burger , Microsoft Research, USA
Daniel A. Jimenez , Univ. of Texas at San Antonio, USA
Babak Falsafi , EPFL, Switzerland
Caches mitigate the long memory latency that limits the performance of modern processors. However, caches can be quite inefficient. On average, a cache block in a 2MB L2 cache is dead 59% of the time, i.e., it will not be referenced again before it is evicted. Increasing cache efficiency can improve performance by reducing miss rate, or alternately, improve power and energy by allowing a smaller cache with the same miss rate.
prediction, microarchitecture, cache management
S. Khan, D. Burger, D. A. Jimenez and B. Falsafi, "Using dead blocks as a virtual victim cache," 2010 19th International Conference on Parallel Architectures and Compilation Techniques (PACT), Vienna, Austria, 2010, pp. 489-500.