The Community for Technology Leaders
Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques (2009)
Raleigh, North Carolina, USA
Sept. 12, 2009 to Sept. 16, 2009
ISSN: 1089-795X
ISBN: 978-0-7695-3771-9
pp: 313-324
ABSTRACT
This research demonstrates that coming support for hardware transactional memory can be leveraged to significantly reduce the cost of implementing true speculative multithreading. In particular, it explores the path from eager conflict detection HTM to full support of efficient speculative multithreading, focusing on the case where frequent memory dependencies exist between speculative threads. The result is a unified memory architecture capable of effective support for transactional parallel workloads and efficient speculative multithreading.
INDEX TERMS
Chip Multiprocessors, Speculative Multithreading, Transactional Memory
CITATION
Leo Porter, Dean M. Tullsen, Bumyong Choi, "Mapping Out a Path from Hardware Transactional Memory to Speculative Multithreading", Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques, vol. 00, no. , pp. 313-324, 2009, doi:10.1109/PACT.2009.37
80 ms
(Ver 3.3 (11022016))