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16th International Conference on Parallel Architecture and Compilation Techniques (PACT 2007) (2007)
Brasov, Romania
Sept. 15, 2007 to Sept. 19, 2007
ISSN: 1089-795X
ISBN: 0-7695-2944-5
pp: 428
Jaswanth Sreeram , Georgia Institute of Technology, USA
Romain Cledat , Georgia Institute of Technology, USA
Tushar Kumar , Georgia Institute of Technology, USA
Santosh Pande , Georgia Institute of Technology, USA
ABSTRACT
Software Transactional Memory (STM) Systems have been proposed in order to make parallel programs easier to develop and verify compared to conventional lock-based programming techniques. However, conventional STMs do not scale in performance to a large number of concurrent threads for several classes of applications. While the atomicity semantics of traditional STMs greatly simplify the correct sharing of data between threads, these same atomicity semantics incur a large penalty in program execution time.
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CITATION

T. Kumar, J. Sreeram, S. Pande and R. Cledat, "RSTM : A Relaxed Consistency Software Transactional Memory for Multicores," 16th International Conference on Parallel Architecture and Compilation Techniques (PACT 2007)(PACT), Brasov, Romania, 2007, pp. 428.
doi:10.1109/PACT.2007.62
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