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16th International Conference on Parallel Architecture and Compilation Techniques (PACT 2007) (2007)
Brasov, Romania
Sept. 15, 2007 to Sept. 19, 2007
ISSN: 1089-795X
ISBN: 0-7695-2944-5
pp: 424
Bogdan F. Romanescu , Duke University
Michael E. Bauer , Duke University
Daniel J. Sorin , Duke University
Sule Ozev , Duke University
ABSTRACT
A major problem facing the computer and semi-conductor industries is the increasing amount of CMOS process variability [1, 3]. Variability in low-level circuit parameters, such as transistor gate length and gate oxide thickness, complicates system design by introducing uncertainty about how a fabricated system will perform. Although a circuit or chip is designed to run at a nominal clock frequency, the fabricated implementation may vary far from this expected performance.
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CITATION

S. Ozev, M. E. Bauer, B. F. Romanescu and D. J. Sorin, "Reducing the Impact of Process Variability with Prefetching and Criticality-Based Resource Allocation," 16th International Conference on Parallel Architecture and Compilation Techniques (PACT 2007)(PACT), Brasov, Romania, 2007, pp. 424.
doi:10.1109/PACT.2007.59
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