Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques (2007)
Sept. 15, 2007 to Sept. 19, 2007
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/PACT.2007.70
Stijn Eyerman , Ghent University, Belgium
Lieven Eeckhout , Ghent University, Belgium
James E. Smith , University of Wisconsin-Madison, USA
In modern processors, both the hardware implementation and optimizing compilers are very complex, and they often interact in unpredictable ways. A high performance microarchitecture typically issues instructions out-of-order and must deal with a number of disruptive miss events such as branch mispredictions and cache misses. An optimizing compiler implements a large number of individual optimizations which not only interact with the microarchitecture, but also interact with each other. These interactions can be constructive, destructive, or neutral. Furthermore, whether there is performance gain or loss often depends on the particular program being optimized and executed.
Stijn Eyerman, Lieven Eeckhout, James E. Smith, "Studying Compiler-Microarchitecture Interactions through Interval Analysis", Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques, vol. 00, no. , pp. 406, 2007, doi:10.1109/PACT.2007.70