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16th International Conference on Parallel Architecture and Compilation Techniques (PACT 2007) (2007)
Brasov, Romania
Sept. 15, 2007 to Sept. 19, 2007
ISSN: 1089-795X
ISBN: 0-7695-2944-5
pp: 327-338
Salman Khan , University of Edinburgh, UK
Polychronis Xekalakis , University of Edinburgh, UK
John Cavazos , University of Edinburgh, UK
Marcelo Cintra , University of Edinburgh, UK
The vast number of transistors available through modern fabrication technology gives architects an unprecedented amount of freedom in chip-multiprocessor (CMP) designs. However, such freedom translates into a design space that is impossible to fully, or even partially to any significant frac- tion, explore through detailed simulation. In this paper we propose to address this problem using predictive modeling, a well-known machine learning technique. More specifi- cally we build models that, given only a minute fraction of the design space, are able to accurately predict the behav- ior of the remaining designs orders of magnitude faster than simulating them. <p>In contrast to previous work, our models can predict per- formance metrics not only for unseen CMP configurations for a given application, but also for unseen configurations of a new application that was not in the set of applications used to build the model, given only a very small number of results for this new application.</p> <p>We perform extensive experiments to show the efficacy of the technique for exploring the design space of CMP?s running parallel applications. The technique is used to pre- dict both energy-delay and execution time. Choosing both explicitly parallel applications and applications that are parallelized using the thread-level speculation (TLS) ap- proach, we evaluate performance on a CMP design space with about 95 million points using 18 benchmarks with up to 1000 training points each. For predicting the energy- delay metric, prediction errors for unseen configurations of the same application range from 2.4% to 4.6% and for con- figurations of new applications from 3.1% to 4.9%.</p>

S. Khan, J. Cavazos, P. Xekalakis and M. Cintra, "Using PredictiveModeling for Cross-Program Design Space Exploration in Multicore Systems," 16th International Conference on Parallel Architecture and Compilation Techniques (PACT 2007)(PACT), Brasov, Romania, 2007, pp. 327-338.
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