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Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques (2007)
Brasov, Romania
Sept. 15, 2007 to Sept. 19, 2007
ISSN: 1089-795X
ISBN: 0-7695-2944-5
pp: 305-316
Alex Pajuelo , Universitat Politecnica de Catalunya, Spain
Enrique Fernandez , Universidad de Las Palmas de Gran Canaria, Spain
Mateo Valero , Barcelona Supercomputing Center, Spain; Universitat Politecnica de Catalunya, Spain
Francisco J. Cazorla , Barcelona Supercomputing Center, Spain
Oliverio J. Santana , Universidad de Las Palmas de Gran Canaria, Spain
Javier Vera , Barcelona Supercomputing Center, Spain
ABSTRACT
Nowadays, multithreaded architectures are becoming more and more populal: In order to evaluate their behavior, several methodologies and metrics have been proposed. A methodology defines when the measurements of a given workload execution are taken. A metric combines those measurements to obtain a final evaluation result. However, since current evaluation methodologies do not provide representative measurements for these metrics, the analysis and evaluation of novel ideas could be either unfair or misleading. Given the potential impact of multithreaded architectures on current andfuture processor designs, it is crucial to develop an accurate evaluation methodology for them. <p>This paperpresents FAME, a new evaluation methodology aimed to fairly measure the perj-ormance of rnultithreaded processors. FAME reexecutes all traces in a rnultithreaded workload until all of them are fairly represented in the final measurements taken from the workload. We compare FAME with previously used methodologies for both architectural research simulators and real processors. Our results show that FAMEprovides more accurate measurements than other methodologies, becoming an ideal evaluation methodology to analyze proposals for multithreaded architectures.</p>
INDEX TERMS
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CITATION
Alex Pajuelo, Enrique Fernandez, Mateo Valero, Francisco J. Cazorla, Oliverio J. Santana, Javier Vera, "FAME: FAirly MEasuring Multithreaded Architectures", Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques, vol. 00, no. , pp. 305-316, 2007, doi:10.1109/PACT.2007.33
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