16th International Conference on Parallel Architecture and Compilation Techniques (PACT 2007) (2007)
Sept. 15, 2007 to Sept. 19, 2007
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/PACT.2007.20
Priya Nagpurkar , University of California, Santa Barbara, USA
Harold W. Cain , IBM T.J. Watson Research Center, USA
Mauricio Serrano , IBM T.J. Watson Research Center, USA
Jong-Deok Choi , Samsung Electronics, Korea
Chandra Krintz , University of California, Santa Barbara, USA
We present a detailed characterization of instruction cache performance for IBM?s J2EE-enabled web server, WebSphere Application Server (WAS). When running two J2EE benchmarks on WebSphere, we find that instruction cache misses cause a 12% performance penalty on current-generation Power5-based multiprocessor systems. To mitigate this performance loss, we describe a new call-chain based algorithm for inserting software prefetch instructions, and evaluate its potential for improved instruction cache performance. The performance of this algorithm depends on the selection of several independent parameters which control the distance and number of prefetches inserted for a particular method. We select these parameters through characterization of the WebSphere applications, and ultimately find that our call-chain based insertion algorithm achieves significant reduction in instruction cache miss rate for Java methods.
M. Serrano, H. W. Cain, C. Krintz, P. Nagpurkar and J. Choi, "Call-chain Software Instruction Prefetching in J2EE Server Applications," 16th International Conference on Parallel Architecture and Compilation Techniques (PACT 2007)(PACT), Brasov, Romania, 2007, pp. 140-149.