The Community for Technology Leaders
2006 International Conference on Parallel Architectures and Compilation Techniques (PACT) (2006)
Seattle, WA, USA
Sept. 16, 2006 to Sept. 20, 2006
ISBN: 978-1-5090-3022-4
TABLE OF CONTENTS

Front matters (Abstract)

pp. i-xii

Architectural support for operating system-driven CMP cache management (Abstract)

Nauman Rafique , School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN 47907-2035
Won-Taek Lim , School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN 47907-2035
Mithuna Thottethodi , School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN 47907-2035
pp. 2-12

Communist, Utilitarian, and Capitalist cache policies on CMPs: Caches as a shared resource (Abstract)

Lisa R. Hsu , University of Michigan, Ann Arbor, Michigan
Steven K. Reinhardt , University of Michigan, Ann Arbor, Michigan
Ravishankar Iyer , Intel Corp, Hillsboro, Oregon
Srihari Makineni , Intel Corp, Hillsboro, Oregon
pp. 13-22

Core architecture optimization for heterogeneous chip multiprocessors (Abstract)

Rakesh Kumar , Dept of Computer Science and Engineering, University of California, San Diego La Jolla, CA 92093-0404
Dean M. Tullsen , Dept of Computer Science and Engineering, University of California, San Diego La Jolla, CA 92093-0404
Norman P. Jouppi , HP Labs, 1501 Page Mill Road, Palo Alto, CA 94304
pp. 23-32

Compiling for stream processing (Abstract)

Abhishek Das , Stanford University
William J. Dally , Stanford University
Peter Mattson , Stream Processors, Inc.
pp. 33-42

Region array SSA (Abstract)

Silvius Rust , Parasol Lab, Department of Computer Science, Texas A&M University
Guobin He , Parasol Lab, Department of Computer Science, Texas A&M University
Christophe Alias , Laboratoire de l'Informatique du Parallelism, ENS Lyon
Lawrence Rauchwerger , Parasol Lab, Department of Computer Science, Texas A&M University
pp. 43-52

A two-phase escape analysis for parallel Java programs (Abstract)

Kyungwoo Lee , Purdue University, West Lafayette, IN
Samuel. P. Midkiff , Purdue University, West Lafayette, IN
pp. 53-62

Self-checking instructions — reducing instruction redundancy for concurrent error detection (Abstract)

Sumeet Kumar , Electrical and Computer Engineering, Binghamton University, Binghamton, NY
Aneesh Aggarwal , Electrical and Computer Engineering, Binghamton University, Binghamton, NY
pp. 64-73

A low-cost memory remapping scheme for address bus protection (Abstract)

Lan Gao , Computer Science and Engineering Department, University of California, Riverside, Riverside, CA 92521
Jun Yang , Computer Science and Engineering Department, University of California, Riverside, Riverside, CA 92521
Marek Chrobak , Computer Science and Engineering Department, University of California, Riverside, Riverside, CA 92521
Youtao Zhang , Computer Science Department, University of Pittsburgh, Pittsburgh, PA 15260
San Nguyen , Computer Science and Engineering Department, University of California, Riverside, Riverside, CA 92521
Hsien-Hsin S. Lee , School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA 30332
pp. 74-83

Efficient data protection for distributed shared memory multiprocessors (Abstract)

Brian Rogers , Dept. of Electrical and Computer Engineering, North Carolina State University
Milos Prvulovic , College of Computing, Georgia Institute of Technology
Yan Solihin , Dept. of Electrical and Computer Engineering, North Carolina State University
pp. 84-94

Wavelet-based phase classification (Abstract)

Ted Huffmire , Department of Computer Science, University of California, Santa Barbara, Santa Barbara, CA
Tim Sherwood , Department of Computer Science, University of California, Santa Barbara, Santa Barbara, CA
pp. 95-104

Complexity-based program phase analysis and classification (Abstract)

Chang-Burm Cho , Intelligent Design of Efficient Architecture Lab (IDEAL), Department of Electrical and Computer Engineering, University of Florida
Tao Li , Intelligent Design of Efficient Architecture Lab (IDEAL), Department of Electrical and Computer Engineering, University of Florida
pp. 105-113

Performance prediction based on inherent program similarity (Abstract)

Kenneth Hoste , ELIS, Ghent University, Belgium
Aashish Phansalkar , ECE, The University of Texas at Austin
Lieven Eeckhout , ELIS, Ghent University, Belgium
Andy Georges , ELIS, Ghent University, Belgium
Lizy K. John , ECE, The University of Texas at Austin
Koen De Bosschere , ELIS, Ghent University, Belgium
pp. 114-122

Keynote talk: Deep computing in biology: Challenges and progress (Abstract)

Ajay Royyuru , IBM T.J. Watson Research Center, Yorktown Heights, New York, USA
pp. 123

Hardware support for spin management in overcommitted virtual machines (Abstract)

Philip M. Wells , Computer Sciences Department, University of Wisconsin, Madison
Koushik Chakraborty , Computer Sciences Department, University of Wisconsin, Madison
Gurindar S. Sohi , Computer Sciences Department, University of Wisconsin, Madison
pp. 124-133

Testing implementations of transactional memory (Abstract)

Chaiyasit Manovit , Sun Microsystems, Sunnyvale, CA, USA
Sudheendra Hangal , Magic Lamp Software, Bangalore, India
Hassan Chafi , Stanford University, Stanford, CA, USA
Austen McDonald , Stanford University, Stanford, CA, USA
Christos Kozyrakis , Stanford University, Stanford, CA, USA
Kunle Olukotun , Stanford University, Stanford, CA, USA
pp. 134-143

Efficient emulation of hardware prefetchers via event-driven helper threading (Abstract)

Ilya Ganusov , Computer Systems Laboratory, Cornell University, Ithaca, New York
Martin Burtscher , Computer Systems Laboratory, Cornell University, Ithaca, New York
pp. 144-153

DEP: Detailed execution profile (Abstract)

Qin Zhao , Singapore-MIT Alliance, National University of Singapore
Joon Edward Sim , Department of Computer Science, National University of Singapore
Weng-Fai Wong , Singapore-MIT Alliance, National University of Singapore
Larry Rudolph , Singapore-MIT Alliance, Computer Science and Artificial Intelligence, Laboratory, Massachusetts Institute of Technology
pp. 154-163

Whole-program optimization of global variable layout (Abstract)

Nathaniel Mcintosh , Java, Compilers, and Tools Laboratory, Hewlett-Packard Company
Sandya Mannarswamy , Java, Compilers, and Tools Laboratory, Hewlett-Packard Company
Robert Hundt , Java, Compilers, and Tools Laboratory, Hewlett-Packard Company
pp. 164-172

Fast, automatic, procedure-level performance tuning (Abstract)

Zhelong Pan , Purdue University, School of ECE, West Lafayette, IN
Rudolf Eigenmann , Purdue University, School of ECE, West Lafayette, IN
pp. 173-181

Reducing control overhead in dataflow architectures (Abstract)

Andrew Petersen , Computer Science & Engineering, University of Washington, Box 352350, Seattle, WA 98195-2350
Martha Mercaldi , Computer Science & Engineering, University of Washington, Box 352350, Seattle, WA 98195-2350
Steve Swanson , Computer Science & Engineering, University of Washington, Box 352350, Seattle, WA 98195-2350
Andrew Putnam , Computer Science & Engineering, University of Washington, Box 352350, Seattle, WA 98195-2350
Andrew Schwerin , Computer Science & Engineering, University of Washington, Box 352350, Seattle, WA 98195-2350
Mark Oskin , Computer Science & Engineering, University of Washington, Box 352350, Seattle, WA 98195-2350
Susan Eggers , Computer Science & Engineering, University of Washington, Box 352350, Seattle, WA 98195-2350
pp. 182-191

Power-efficient instruction delivery through trace reuse (Abstract)

Chengmo Yang , Computer Science and Engineering Department, University of California, San Diego, 9500 Gilman Drive, La Jolla, CA 92093
Alex Orailoglu , Computer Science and Engineering Department, University of California, San Diego, 9500 Gilman Drive, La Jolla, CA 92093
pp. 192-201

Branch predictor guided instruction decoding (Abstract)

Oliverio J. Santana , Universidad de Las Palmas, de Gran Canaria
Ayose Falcon , Barcelona Research Office, HP Labs
Alex Ramirez , Universitat Politécnica de Catalunya and Barcelona Supercomputing Center
Mateo Valero , Universitat Politécnica de Catalunya and Barcelona Supercomputing Center
pp. 202-211

Two-level mapping based cache index selection for packet forwarding engines (Abstract)

Kaushik Rajan , Dept. of Computer Science & Automation, Indian Institute of Science, Bangalore, India
R. Govindarajan , Dept. of Computer Science & Automation, Indian Institute of Science, Bangalore, India
pp. 212-221

Program generation for the all-pairs shortest path problem (Abstract)

Sung-Chul Han , Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA 15213
Franz Franchetti , Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA 15213
Markus Puschel , Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA 15213
pp. 222-232

Combining analytical and empirical approaches in tuning matrix transposition (Abstract)

Qingda Lu , Dept. of Computer Science and Engineering, The Ohio State University, Columbus, OH, USA
Sriram Krishnamoorthy , Dept. of Computer Science and Engineering, The Ohio State University, Columbus, OH, USA
P. Sadayappan , Dept. of Computer Science and Engineering, The Ohio State University, Columbus, OH, USA
pp. 233-242

Keynote talk: Processor architecture: Too much parallelism? (Abstract)

David B. Kirk , NVIDIA, 2701 San Tomas Expressway, Santa Clara, CA 95050 USA
pp. 243

Adaptive reorder buffers for SMT processors (Abstract)

Joseph Sharkey , Department of Computer Science, State University of New York, Binghamton, NY 13902-6000
Deniz Balkan , Department of Computer Science, State University of New York, Binghamton, NY 13902-6000
Dmitry Ponomarev , Department of Computer Science, State University of New York, Binghamton, NY 13902-6000
pp. 244-253

SEED: Scalable, efficient enforcement of dependences (Abstract)

Francisco J. Mesa-Martinez , Dept. of Computer Engineering, University of California Santa Cruz, "Dept. of Electrical and Computer Engineering, University of Rochester
Michael C. Huangq , Dept. of Computer Engineering, University of California Santa Cruz, "Dept. of Electrical and Computer Engineering, University of Rochester
Jose Renau , Dept. of Computer Engineering, University of California Santa Cruz, "Dept. of Electrical and Computer Engineering, University of Rochester
pp. 254-264

SPARTAN: Speculative avoidance of register allocations to transient values for performance and energy efficiency (Abstract)

Deniz Balkan , Department of Computer Science, State University of New York, Binghamton, NY 13902-6000
Joseph Sharkey , Department of Computer Science, State University of New York, Binghamton, NY 13902-6000
Dmitry Ponomarev , Department of Computer Science, State University of New York, Binghamton, NY 13902-6000
Kanad Ghose , Department of Computer Science, State University of New York, Binghamton, NY 13902-6000
pp. 265-274

Overlapping dependent loads with addressless preload (Abstract)

Zhen Yang , Computer and Information Science and Engineering, University of Florida, Gainesville, FL 32611, USA
Xudong Shi , Computer and Information Science and Engineering, University of Florida, Gainesville, FL 32611, USA
Feiqi Su , Computer and Information Science and Engineering, University of Florida, Gainesville, FL 32611, USA
Jih-Kwon Peir , Computer and Information Science and Engineering, University of Florida, Gainesville, FL 32611, USA
pp. 275-284

Prematerialization: Reducing register pressure for free (Abstract)

Ivan D. Baev , Java, Compilers, and Tools Laboratory, Hewlett-Packard Company, 11000 Wolfe Road, Cupertino, CA 95014
Richard E. Hank , Java, Compilers, and Tools Laboratory, Hewlett-Packard Company, 11000 Wolfe Road, Cupertino, CA 95014
David H. Gross , Java, Compilers, and Tools Laboratory, Hewlett-Packard Company, 11000 Wolfe Road, Cupertino, CA 95014
pp. 285-294

An empirical evaluation of chains of recurrences for array dependence testing (Abstract)

J. Birch , Department of Computer Science and School of Computational Science, Florida State University, Tallahassee, FL 32306-4530
R. A. van Engelen , Department of Computer Science and School of Computational Science, Florida State University, Tallahassee, FL 32306-4530
K. A. Gallivan , Department of Computer Science and School of Computational Science, Florida State University, Tallahassee, FL 32306-4530
Y. Shou , Department of Computer Science and School of Computational Science, Florida State University, Tallahassee, FL 32306-4530
pp. 295-304

Back matters (Abstract)

pp. 305-307
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