2006 International Conference on Parallel Architectures and Compilation Techniques (PACT) (2006)
Seattle, WA, USA
Sept. 16, 2006 to Sept. 20, 2006
DOI Bookmark: http://doi.ieeecomputersociety.org/
David B. Kirk , NVIDIA, 2701 San Tomas Expressway, Santa Clara, CA 95050 USA
CPUs and GPUs have evolved considerably in the past few years, and the pace of change and evolution in processor architecture is likely to increase. Constraints of excess heat dissipation and power consumption have forced a radical rethinking of microprocessor architecture, from the headlong pursuit of GHz clock rates to multicore and multithreaded approaches. The demands of graphics vertex and pixel processing as well as more general non-graphics applications have driven GPUs to be powerful data-parallel floating point processing engines. Research and development in programming languages and environments has not kept pace with the changes in processors. Consequently, computer science and computer engineering research and education is not addressing important problems, or preparing students well for today's computer industry. This talk will provide some historical and architectural perspective on data-parallel GPU architectures, and will attempt to make some trend predictions for the future of GPUs. We will then provide some examples of successes and failures in mapping parallel algorithms to these architectures. Finally, we will conclude with some calls to action in research and education, to improve the utilization of these ubiquitous and powerful parallel machines.
Languages, Algorithms, Performance, Design, Human Factors, Standardization
D. B. Kirk, "Keynote talk: Processor architecture: Too much parallelism?," 2006 International Conference on Parallel Architectures and Compilation Techniques (PACT), Seattle, WA, USA, 2006, pp. 243.