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Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques (2004)
Antibes Juan-les-Pins, France
Sept. 29, 2004 to Oct. 3, 2004
ISSN: 1089-795X
ISBN: 0-7695-2229-7
TABLE OF CONTENTS

Reviewers (PDF)

pp. xii-xiii
Keynote Address

Breaking Down the Memory Wall for Scalable Microprocessor Platforms (PDF)

Wen-Mei Hwu , University of Illinois at Champaign-Urbana, USA
pp. 3
Session 1: Code Generation

Code Generation in the Polyhedral Model Is Easier Than You Think (Abstract)

C?dric Bastoul , Universit? de Versailles Saint Quentin, France
pp. 7-16

A Compiler Framework for Recovery Code Generation in General Speculative Optimizations (Abstract)

Pen-Chung Yew , University of Minnesota
Jin Lin , University of Minnesota
Wei-Chung Hsu , University of Minnesota
Roy Dz-Ching Ju , Intel Corporation, Santa Clara, CA
Tin-Fook Ngai , Intel Corporation, Santa Clara, CA
pp. 17-28

A Multi-Platform Co-Array Fortran Compiler (Abstract)

Yuri Dotsenko , Rice University, Houston, TX
Cristian Coarfa , Rice University, Houston, TX
John Mellor-Crummey , Rice University, Houston, TX
pp. 29-40
Session 2: Architecture

Adding Limited Reconfigurability to Superscalar Processors (Abstract)

Paolo Ienne , Processor Architecture Lab
Daniel Mlynek , Signal Processing Institute
Marc Epalza , Signal Processing Institute
pp. 53-62

Architectural Support for Enhanced SMT Job Scheduling (Abstract)

Dan Connors , University of Colorado at Boulder
Andrew Janiszewski , University of Colorado at Boulder
Alex Settle , University of Colorado at Boulder
Joshua Kihm , University of Colorado at Boulder
pp. 63-73

Static Placement, Dynamic Issue (SPDI) Scheduling for EDGE Architectures (Abstract)

Calvin Lin , The University of Texas at Austin
Doug Burger , The University of Texas at Austin
Stephen W. Keckler , The University of Texas at Austin
Ramadass Nagarajan , The University of Texas at Austin
Kathryn S. McKinley , The University of Texas at Austin
Sundeep K. Kushwaha , The University of Texas at Austin
pp. 74-84

A High-Performance SIMD Floating Point Unit for BlueGene/L: Architecture, Compilation, and Algorithm Design (Abstract)

Gary K. Liu , IBM Corporation, Markham, ON, Canada
Manish Gupta , IBM T. J. Watson Research Center, Yorktown Heights, NY
Siddhartha Chatterjee , IBM T. J. Watson Research Center, Yorktown Heights, NY
Fred G. Gustavson , IBM T. J. Watson Research Center, Yorktown Heights, NY
Charles D. Wait , IBM Corporation, Rochester, MN
Mark P. Mendell , IBM Corporation, Markham, ON, Canada
T. J. Chris Ward , IBM T. J. Watson Research Center, Yorktown Heights, NY
Kenneth A. Dockser , IBM Corporation, Research Triangle Park, NC
Christopher A. Lapkowski , IBM Corporation, Markham, ON, Canada
John A. Gunnels , IBM T. J. Watson Research Center, Yorktown Heights, NY
Leonardo Bachega , IBM T. J. Watson Research Center, Yorktown Heights, NY
pp. 85-96
Session 3: Memory Hierarchy

Impact of Java Memory Model on Out-of-Order Multiprocessors (Abstract)

Qinghua Shen , National University of Singapore
Abhik Roychoudhury , National University of Singapore
Tulika Mitra , National University of Singapore
pp. 99-110

Fair Cache Sharing and Partitioning in a Chip Multiprocessor Architecture (Abstract)

Dhruba Chandra , North Carolina State University
Yan Solihin , North Carolina State University
Seongbeom Kim , North Carolina State University
pp. 111-122

Architectural Support for High Speed Protection of Memory Integrity and Confidentiality in Multiprocessor Systems (Abstract)

Chenghuai Lu , Georgia Institute of Technology, Atlanta, GA
Mrinmoy Ghosh , Georgia Institute of Technology, Atlanta, GA
Hsien-Hsin S. Lee , Georgia Institute of Technology, Atlanta, GA
Weidong Shi , Georgia Institute of Technology, Atlanta, GA
pp. 123-134

AC/DC: An Adaptive Data Cache Prefetcher (Abstract)

James E. Smith , University of Wisconsin - Madison
Ashutosh S. Dhodapkar , University of Wisconsin - Madison
Kyle J. Nesbit , University of Wisconsin - Madison
pp. 135-145
Keynote Address
Session 4: Compiler Optimizations

The Energy Impact of Aggressive Loop Fusion (Abstract)

YongKang Zhu , University of Rochester, New York
Michael L. Scott , University of Rochester, New York
Chen Ding , University of Rochester, New York
David H. Albonesi , University of Rochester, New York
Grigorios Magklis , Intel Barcelona Research Center, Barcelona, Spain
pp. 153-164

Scalable High Performance Cross-Module Inlining (Abstract)

Luis A. Lozano , Hewlett-Packard Company, Cupertino, CA
Xinliang D. Li , Hewlett-Packard Company, Cupertino, CA
Shin-Ming Liu , Hewlett-Packard Company, Cupertino, CA
Dhruva R. Chakrabarti , Hewlett-Packard Company, Cupertino, CA
Robert Hundt , Hewlett-Packard Company, Cupertino, CA
pp. 165-176

Decoupled Software Pipelining with the Synchronization Array (Abstract)

Neil Vachharajani , Princeton University
Manish Vachharajani , Princeton University
David I. August , Princeton University
Ram Rangan , Princeton University
pp. 177-188

Fast Paths in Concurrent Programs (Abstract)

Wen Xu , Princeton University
Sanjeev Kumar , Intel Corporation
Kai Li , Princeton University
pp. 189-200
Session 5: Parallel Systems

Compiler Estimation of Load Imbalance Overhead in Speculative Parallelization (Abstract)

Jialin Dou , University of Edinburgh, UK
Marcelo Cintra , University of Edinburgh, UK
pp. 203-214

Implementing Malleability on MPI Jobs (Abstract)

Julita Corbal? , Universitat Polit?cnica de Catalunya (UPC)
Jes? Labarta , Universitat Polit?cnica de Catalunya (UPC)
Gladys Utrera , Universitat Polit?cnica de Catalunya (UPC)
pp. 215-224

Partitioning of Code for a Massively Parallel Machine (Abstract)

Cristina Cifuentes , Sun Microsystems Labs, Mountain View, CA
Deepankar Bairagi , Sun Microsystems, Menlo Park, CA
Michael Ball , Sun Microsystems, Menlo Park, CA
pp. 225-236
Keynote Address
Session 6: Memory Parallelism

The Value Evolution Graph and its Use in Memory Reference Analysis (Abstract)

Silvius Rus , Texas A&M University
Lawrence Rauchwerger , Texas A&M University
Dongmin Zhang , Texas A&M University
pp. 243-254

TO-Lock: Removing Lock Overhead Using the Owners' Temporal Locality (Abstract)

Hideaki Komatsu , Tokyo Research Laboratory, IBM Japan
Takeshi Ogasawara , Tokyo Research Laboratory, IBM Japan
Toshio Nakatani , Tokyo Research Laboratory, IBM Japan
pp. 255-266

The Stream Virtual Machine (Abstract)

Ian Buck , Stanford University
Christos Kozyrakis , Stanford University
Peter Mattson , Reservoir Labs
Francois Labonte , Stanford University
Mark Horowitz , Stanford University
pp. 267-277

An Adaptive Algorithm Selection Framework (Abstract)

Hao Yu , IBM T. J. Watson Research Ctr, Yorktown Heights, NY
Lawrence Rauchwerger , Texas A&M University
Dongmin Zhang , Texas A&M University
pp. 278-289

Author Index (PDF)

pp. 291
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