2003 12th International Conference on Parallel Architectures and Compilation Techniques (2003)
New Orleans, Louisiana
Sept. 27, 2003 to Oct. 1, 2003
Phuong Hoai Ha , Chalmers University of Technology
Philippas Tsigas , Chalmers University of Technology
<p>Shared memory multiprocessor systems typically provide a set of hardware primitives in order to support synchronization. Generally, they provide single-word read-modify-write hardware primitives such as compare-and-swap, load-linked/store-conditional and fetch-and-op, from which the higher-level synchronization operations are then implemented in software. Although the single-word hardware primitives are conceptually powerful enough to support higher-level synchronization, from the programmer?s point of view they are not as useful as their generalizations to the multi-word objects.</p> <p>This paper presents two fast and reactive lock-free multi-word compare-and-swap algorithms. The algorithms dynamically measure the level of contention as well as the memory con.icts of the multi-word compare-and-swap operations, and in response, they react accordingly in order to guarantee good performance in a wide range of system conditions. The algorithms are non-blocking (lock-free), allowing in this way fast dynamical behavior. Experiments on thirty processors of a SGI Origin2000 multiprocessor show that both our algorithms react fast according to the contention variations and perform from two to nine times faster than the best known alternatives in all contention conditions.</p>
P. H. Ha and P. Tsigas, "Reactive Multi-Word Synchronization for Multiprocessors," 2003 12th International Conference on Parallel Architectures and Compilation Techniques(PACT), New Orleans, Louisiana, 2003, pp. 184.