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1999 International Conference on Parallel Architectures and Compilation Techniques (Cat. No.PR00425) (1999)
Newport Beach, California
Oct. 12, 1999 to Oct. 16, 1999
ISSN: 1089-795X
ISBN: 0-7695-0425-6
pp: 283
M.F.P. O'Boyle , University of Edinburgh
P.M.W. Knijnenburg , Leiden University
ABSTRACT
This paper attempts to minimize parallelization overhead on distributed shared memory machines, such as the SGi Origin 2000, by the combination of non-singular loop and data transformations. We show that conflicting requirements on a loop transformation may be resolved by using a data transformation and vice-versa. We develop optimization criteria for locality, synchronization and communication and show that neither loop nor data transformations can be solely used for efficient parallelization. This leads to the development of a novel global optimization heuristic which is applied to 3 SPEC kernels where it is shown to outperform techniques solely based on loop or data transformations and to give significant improvement over an existing state-of-the- art commercial auto-parallelizer.
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CITATION

M. O'Boyle and P. Knijnenburg, "Efficient Parallelization using Combined Loop and Data Transformations," 1999 International Conference on Parallel Architectures and Compilation Techniques (Cat. No.PR00425)(PACT), Newport Beach, California, 1999, pp. 283.
doi:10.1109/PACT.1999.807573
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