Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques (1998)
Oct. 12, 1998 to Oct. 18, 1998
Roger Espasa , Universitat Politecnica de Catalunya
Mateo Valero , Universitat Politecnica de Catalunya
Jesus Corbal , Universitat Politecnica de Catalunya
The focus of this paper is on designing both a low cost and high performance, high bandwidth vector memory system that takes advantage of modern commodity SDRAM memory chips. To successfully extract the full bandwidth from SDRAM parts, we propose a new memory system organization based on sending commands to the memory system as opposed to sending individual addresses. A command specifies, in a few bytes, a request for multiple independent memory words. A command is similar to a burst found in DRAM memories, but does not require the memory words to be consecutive. The command is sent to all sections of the memory array simultaneously, thus not requiring a crossbar in the proper sense. Our simulations show that this command based memory system can improve performance over a traditional SDRAM-based memory system by factors that range between 1.15 up to 1.54. Moreover, in many cases, the command memory system outperforms even the best SRAM memory system under consideration. Overall the command based memory system achieves similar or better results than a 10ns SRAM memory system (a) using fewer banks and (b) using memory devices that are between 15 to 60 times cheaper.
vector processors, memory systems, SDRAM
Roger Espasa, Mateo Valero, Jesus Corbal, "Command Vector Memory Systems: High Performance at Low Cost", Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques, vol. 00, no. , pp. 68, 1998, doi:10.1109/PACT.1998.727154