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Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques (1997)
San Francisco, CA
Nov. 11, 1997 to Nov. 15, 1997
ISSN: 1089-795X
ISBN: 0-8186-8090-3
TABLE OF CONTENTS
SESSION I. ANALYSIS AND CODE OPTIMIZATIONS: CHAIR: K. Pingali

Heap Analysis And Optimizations For Threaded Programs (Abstract)

L.J. Hendren , Sch. of Comput. Sci., McGill Univ., Montreal, Que., Canada
Xinan Tang , Sch. of Comput. Sci., McGill Univ., Montreal, Que., Canada
R. Ghiya , Sch. of Comput. Sci., McGill Univ., Montreal, Que., Canada
G.R. Gao , Sch. of Comput. Sci., McGill Univ., Montreal, Que., Canada
pp. 14

Interprocedural Distribution Assignment Placement: More Than Just Enhancing Intraprocedural Placing Techniques (Abstract)

E. Mehofer , Fakultat fur Math. und Inf., Passau Univ., Germany
J. Knoop , Fakultat fur Math. und Inf., Passau Univ., Germany
pp. 26
SESSION II. NETWORKS/COMMUNICATION OPTIMIZATION: CHAIR: S. Evripidou

Efficient Personalized Communication on Wormhole Networks (Abstract)

Marco Vanneschi , Dipartimento di Informatica
Fabrizio Petrini , International Computer Science Institute, (ICSI)
pp. 52

Empirical Evaluation Of Deterministic And Adaptive Routing With Constant-Area Routers (Abstract)

W.A. Najjar , Dept. of Comput. Sci., Colorado State Univ., Fort Collins, CO, USA
D.R. Miller , Dept. of Comput. Sci., Colorado State Univ., Fort Collins, CO, USA
pp. 64
SESSION III. ILP OPTIMIZATION/CODE SCHEDULING: CHAIR: M. Valero

A Register Pressure Sensitive Instruction Scheduler for Dynamic Issue Processors (Abstract)

J. Wang , Nortel Montreal Lab.
R. Govindarajan , Indian Institute of Science
R. Silvera , IBM Toronto Lab.
G. Gao , McGill University
pp. 78

Path Profile Guided Partial Dead Code Elimination Using Predication (Abstract)

Jesse Z. Fang , Intel Corporation
David A. Berson , Intel Corporation
Rajiv Gupta , University of Pittsburgh
pp. 102
SESSION IV. SHORT PAPERS PRESENTATIONS: CHAIR: G. Egan

The PROMIS Compiler Prototype (Abstract)

Carrie J. Brownhill , University of California, Irvine
Alexandru Nicolau , University of California, Irvine
Steve Novack , University of Illinois at Urbana-Champaign
Constantine D. Polychronopoulos , University of Illinois at Urbana-Champaign
pp. 116

Parallel Execution of Radix Sort Program using Fine-grain Communication (Abstract)

Hirofumi Sakane , Electrotechnical Laboratory
Mitsuhisa Sato , Electrotechnical Laboratory
Yuetsu Kodama , Electrotechnical Laboratory
Shuichi Sakai , Electrotechnical Laboratory
Koike Hanpei , Electrotechnical Laboratory
Yoshinori Yamaguchi , Electrotechnical Laboratory
pp. 136

Interprocedural Array Remapping (Abstract)

Michal Cierniak , University of Rochester
Wei Li , Oracle Corporation
pp. 146

Design of heterogenous multi-processor embedded systems: applying functional pipelining (Abstract)

H. Corporaal , Delft Univ. of Technol., Netherlands
I. Karkowski , Delft Univ. of Technol., Netherlands
pp. 156

VLIW Across Multiple Superscalar Processors on a Single Chip (Abstract)

Soohong P. Kim , Purdue University
Henry G. Dietz , Purdue University
Raymond R. Hoare , Purdue University
pp. 166
SESSION V. PROFILING AND PREDICTION BASED OPTIMIZATIONS: CHAIR: W. Najjar

Path Prediction For High Issue-Rate Processors (Abstract)

S.W. Sathaye , Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
K.N. Menezes , Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
T.M. Coate , Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
pp. 178

MDL: A Language And Compiler For Dynamic Program Instrumentation (Abstract)

O. Niam , Dept. of Comput. Sci., Maryland Univ., College Park, MD, USA
Ling Zheng , Dept. of Comput. Sci., Maryland Univ., College Park, MD, USA
J.K. Hollingsworth , Dept. of Comput. Sci., Maryland Univ., College Park, MD, USA
B.P. Miller , Dept. of Comput. Sci., Maryland Univ., College Park, MD, USA
M.J.R. Goncalves , Dept. of Comput. Sci., Maryland Univ., College Park, MD, USA
Zhichen Xu , Dept. of Comput. Sci., Maryland Univ., College Park, MD, USA
pp. 201
SESSION VI. COMPILATION ISSUES FOR MULTIPROCESSORS: CHAIR: B. Shirazi

Two Techniques for Static Array Partitioning on Message-Passing Parallel Machines (Abstract)

Jean-Luc Gaudiot , University of Southern California
Eric Hung-Yu Tseng , University of Southern California
pp. 225

Compiler Algorithms For Optimizing Locality And Parallelism On Shared And Distributed Memory Machines (Abstract)

A. Choudhary , Dept. of Electr. Eng. & Comput. Sci., Syracuse Univ., NY, USA
M. Kandemir , Dept. of Electr. Eng. & Comput. Sci., Syracuse Univ., NY, USA
J. Ramanujam , Dept. of Electr. Eng. & Comput. Sci., Syracuse Univ., NY, USA
pp. 236
SESSION VII. COMPILER/ARCHITECTURE INTERACTION IN PARALLELISM EXPLOITATION: CHAIR: D. Albonesi

Effective Usage of Vector Registers in Advanced Vector Architectures (Abstract)

Roger Espasa , Universitat Politecnica de Catalunya--Barcelona
Luis Villa , Insatituto Politecnico Nacional de Mexico D.F.
Mateo Valero , Universitat Politecnica de Catalunya--Barcelona
pp. 250

Static Locality Analysis for Cache Management (Abstract)

Antonio Gonzalez , Universitat Politecnica de Catalunya
F. Jesus Sanchez , Universitat Politecnica de Catalunya
Mateo Valero , Universitat Politecnica de Catalunya
pp. 261

Overcoming Limitations Of Prefetching In Multiprocessors By Compiler-Initiated Coherence Action (Abstract)

J. Skeppstedt , Dept. of Comput. Eng., Chalmers Univ. of Technol., Goteborg, Sweden
pp. 272
SESSION VIII. HIGH-LEVEL PARALLELIZATION: CHAIR: A. Sohn

Direct Generation of Data-Driven Program for Stream-Oriented Processing (Abstract)

Kei Karasawa , Osaka University
Makoto Iwata , Kochi University of Technology
Hiroaki Terada , Kochi University of Technology
pp. 295

Determining the Idle Time of a Tiling: New Results (Abstract)

Frederic Desprez , CNRS-INRIA
Yves Robert , CNRS-INRIA
Jack Dongarra , CNRS-INRIA
Fabrice Rastello , CNRS-INRIA
pp. 307

Index Of Authors (PDF)

pp. 318
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