Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques (1996)
Oct. 20, 1996 to Oct. 23, 1996
Shigeru Kusakabe , Kyushu University
Taku Nagai , Kyushu University
Kentaro Inenaga , Kyushu University
Makoto Amamiya , Kyushu University
Dataflow-based fine-grain parallel data-structures provide high-level abstraction to easily write programs with potentially high parallelism. In order to show the feasibility of a fine-grain dataflow paradigm, we are now implementing a non-strict dataflow language on off-the-shelf computers, including a distributed-memory parallel machine. The results of preliminary experiments indicate that the inefficiency related to fine-grain parallel arrays in the naive distributed-memory implementation is mainly caused by the address generation for distributed data. To reduce overhead, we introduce a two-level table addressing technique that can efficiently generate addresses. The results of performance evaluation indicate that this technique is useful to improve the performance at a practical level even on off-the-shelf computers.
Shigeru Kusakabe, Taku Nagai, Kentaro Inenaga, Makoto Amamiya, "Address Generation of Dataflow Fine-Grain Parallel Data-Structures on a Distributed-Memory Computer", Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques, vol. 00, no. , pp. 0139, 1996, doi:10.1109/PACT.1996.552658