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Circuits, Communications and Systems, Pacific-Asia Conference on (2009)
Chengdu, China
May 16, 2009 to May 17, 2009
ISBN: 978-0-7695-3614-9
pp: 338-341
A 16 X 16 CAM (Content-Addressable Memory) based on improved CAL (Clocked Adiabatic Logic) circuits is presented, which is realized using TSMC 0.18um process. The CAL is a dual-rail logic that operates from a single-phase AC power-clock supply. For a comparison, a conventional CAL CAM has also been designed using TSMC 0.18mm process. Full-custom layouts are drawn, and the net-lists are extracted from their layouts. The post-layout simulations have been performed. The results show that the improved CAL CAM can work very well, illustrating an overall power reduction of 30.8% compared with the conventional CAL CAM for search operation at 100 MHz.
content-addressable memory, adiabatic computing, single-phase, low power

X. Luo, J. Hu and J. Fu, "A Single-Phase Adiabatic CAM Using Improved CAL Circuits," 2009 Pacific-Asia Conference on Circuits, Communications and Systems (PACCS 2009)(PACCS), Chengdu, 2009, pp. 338-341.
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