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2014 Sixth International Symposium on Parallel Architectures, Algorithms and Programming (PAAP) (2014)
Beijing, China
July 13, 2014 to July 15, 2014
ISSN: 2168-3034
ISBN: 978-1-4799-3844-5
pp: 7-12
Designing embedded systems has become a challengingprocess due to the increasing complexity of the applications. In addition, there is a need to meet multiple conflicting constraints such as speed, power and cost. These factors have led to an explosion in the design space as each task in the application can have various implementation options (software and a range of hardware customizations), where each implementation option is associated with different speed, power and cost. In this paper, we propose hardware-software (HW/SW) partitioning algorithms that are capable of managing the large design space by taking into account the multiple implementation choices. In particular, we focus on multiple-choice HW/SW partitioning with the following objectives: minimizing execution time and power consumption, while meeting the area constraint. Two algorithms will be presented: 1) a heuristic method that is based on the bi-objective knapsack problem to rapidly generate an approximate solution, 2) a dynamic programming algorithm to calculate the exact solution. Simulation results show that the heuristic method produces results that are very close to the exact ones.
Hardware, Bismuth, Software, Power demand, Partitioning algorithms, Heuristic algorithms, Software algorithms,algorithm, multiple choice, hardware/software partitioning, bi-objective optimization, power consumption
Wenjun Shi, Jigang Wu, Siew-Kei Lam, Thambipillai Srikanthan, "Algorithmic Aspects for Bi-Objective Multiple-Choice Hardware/Software Partitioning", 2014 Sixth International Symposium on Parallel Architectures, Algorithms and Programming (PAAP), vol. 00, no. , pp. 7-12, 2014, doi:10.1109/PAAP.2014.42
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