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Networks-on-Chip, International Symposium on (2007)
Princeton, New Jersey
May 7, 2007 to May 9, 2007
ISBN: 0-7695-2773-6
pp: 295-306
Cedric Koch-Hofer , TIMA Laboratory, France
Marc Renaudin , TIMA Laboratory, France
Yvain Thonnart , CEA-LETI, France
Pascal Vivet , CEA-LETI, France
This paper presents ASC, an Asynchronous SystemC library, as an extension of SystemC for modeling asynchronous circuits. ASC includes a set of port and channel primitives offering the same communication primitives as the common languages used for asynchronous circuits modeling (CHP, Tangram or Balsa). ASC also offers operators and statements in order to accurately model arbiters, which are the basic components of Asynchronous Network on Chips. The aim of this work is to provide to the designers the means of modeling and verifying asynchronous circuits as well as GALS and NoC systems. Synthesis of ASC models with the help of the TAST framework is under development. As an illustrative example, the modeling of an asynchronous Network-on-Chip architecture using the ASC library is described. This NoC has been successfully integrated into a complex GALS NoC architecture taking advantage of a multi-level SystemC based verification environment.

Y. Thonnart, P. Vivet, C. Koch-Hofer and M. Renaudin, "ASC, a SystemC Extension for Modeling Asynchronous Systems, and Its Application to an Asynchronous NoC," 2007 International Symposium on Networks-on-Chip(NOCS), Princeton, NJ, 2007, pp. 295-306.
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