The Community for Technology Leaders
2015 IEEE International Conference on Networking, Architecture and Storage (NAS) (2015)
Boston, MA, USA
Aug. 6, 2015 to Aug. 7, 2015
ISBN: 978-1-4673-7890-1
pp: 326-335
Sai Huang , Wuhan National Lab for Optoelectronics, School of Computer, Huazhong University of Science and Technology, China
Dan Feng , Wuhan National Lab for Optoelectronics, School of Computer, Huazhong University of Science and Technology, China
Jianxi Chen , Wuhan National Lab for Optoelectronics, School of Computer, Huazhong University of Science and Technology, China
Jingning Liu , Wuhan National Lab for Optoelectronics, School of Computer, Huazhong University of Science and Technology, China
ABSTRACT
NAND flash memory has attracted wide attention in both academia and industry in recent years. Its high random access performance fills the gap between DRAM and hard disks. While MLC is endorsed for higher density and lower cost per bit, it suffers from poor performance and endurance. Dual-mode flash combines SLC and MLC in a single device and thus provides the opportunity to trade density for performance. In this paper, we propose the Scalable Flash Storage(SFS) abstraction layer to facilitate cache management on dual-mode flash. SFS exposes a virtualized address space to hide the variable density of the medium. A differentiated write interface is introduced, which allows the cache manager to explicitly send write requests to SLC for high performance. SFS dynamically scales the proportions of SLC and MLC to balance between cache capacity and performance. SFS provides partially persistent storage service. It allows the cache manager to manage the data persistence on flash so that critical data can be retained persistently. Non-persistent data are discarded during garbage collection to mitigate write amplification. Based on the SFS, a Dual-mode Flash Cache(DMFC) architecture is designed to utilize the configurable density and performance. Experimental results show that DMFC can significantly improve overall performance for various workloads.
INDEX TERMS
Ash, Performance evaluation, Computer architecture, Metadata, Microprocessors, Layout, Flash memories
CITATION

S. Huang, D. Feng, J. Chen and Jingning Liu, "Caching on dual-mode flash memory," 2015 IEEE International Conference on Networking, Architecture and Storage (NAS), Boston, MA, USA, 2015, pp. 326-335.
doi:10.1109/NAS.2015.7255199
94 ms
(Ver 3.3 (11022016))