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2012 IEEE Seventh International Conference on Networking, Architecture, and Storage (2012)
Xiamen, China China
June 28, 2012 to June 30, 2012
ISBN: 978-1-4673-1889-1
pp: 293-297
ABSTRACT
Recent years, the application of solid-state disks (SSDs) increases explosively. All SSDs have to employ error correcting code (ECC) technique to ensure the reliability of flash memory at page level. However, data loss may be caused by bad block or chip failure of flash memory. To solve this problem, the article proposes a flash memory redundant array technique, which is similar to RAID-4. In this scheme, we utilize built-in NVRAM to cache the parity data update for minimal write to flash memory in parity channel.
INDEX TERMS
flash array, SSD, reliability, parity scheme
CITATION

Y. Qin, D. Feng, J. Liu, W. Tong, Y. Hu and Z. Zhu, "A Parity Scheme to Enhance Reliability for SSDs," 2012 IEEE 7th International Conference on Networking, Architecture, and Storage (NAS), Xiamen, Fujian, 2012, pp. 293-297.
doi:10.1109/NAS.2012.40
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