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Fifth International Workshop on Microprocessor Test and Verification (MTV'04) (2006)
Austin, Texas
Dec. 4, 2006 to Dec. 5, 2006
ISSN: 1550-4093
ISBN: 0-7695-2839-2
TABLE OF CONTENTS
Introduction

Preface (PDF)

pp. vii

Acknowledgement (PDF)

pp. viii
Section 1: Test

Software-Based On-Line Test of Communication Peripherals in Processor-Based Systems for Automotive Applications (Abstract)

M. Sonza Reorda , Politecnico di Torino, Italy
M. Osella , Centro Ricerche Fiat, Italy
A. Manzone , Centro Ricerche Fiat, Italy
M. Violante , Politecnico di Torino, Italy
P. Bernardi , Politecnico di Torino, Italy
L. Bolzani , Politecnico di Torino, Italy
pp. 3-8

Circuit Profiling Mechanisms for High-Level ATPG (Abstract)

Jorge Campos , University of California, Davis, USA
Hussain Al-Asaad , University of California, Davis, USA
pp. 9-14

Functional Test Selection for High Volume Manufacturing (Abstract)

Deepa Bhan , Intel Corporation, USA
James K. Caldwell , Intel Corporation, USA
Vijay Gangaram , Intel Corporation, USA
pp. 15-19

Test Calculation for Logic and Delay Faults in Digital Circuits (Abstract)

Jozsef Sziray , Szechenyi University, Hungary
pp. 20-32
Section 2: Verification and Test Generation

Directed Micro-architectural Test Generation for an Industrial Processor: A Case Study (Abstract)

Heon-Mo Koo , University of Florida, USA
Magdy Abadir , Freescale Semiconductor Inc., USA
Jayanta Bhadra , Freescale Semiconductor Inc., USA
Prabhat Mishra , University of Florida, USA
pp. 33-36

Advanced SAT-Techniques for Bounded Model Checking of Blackbox Designs (Abstract)

Christoph Scholl , Albert-Ludwigs-University, Germany
Bernd Becker , Albert-Ludwigs-University, Germany
Marc Herbstritt , Albert-Ludwigs-University, Germany
pp. 37-44

Embedded Software Validation: Applying Formal Techniques for Coverage and Test Generation (Abstract)

Terry Murphy , Intel Corporation
Elad Elster , Intel Corporation
Tamarah Arons , Intel Corporation
Eli Singerman , Intel Corporation
pp. 45-51

Challenges in System on Chip Verification (Abstract)

Rekha K Bangalore , Freescale Semiconductor Ltd., China, Mexico, USA
Edgar Jimenez , Freescale Semiconductor Ltd., China, Mexico, USA
Hector Chavez , Freescale Semiconductor Ltd., China, Mexico, USA
Rajeev Dasari , Freescale Semiconductor Ltd., China, Mexico, USA
Eric Chapman , Freescale Semiconductor Ltd., China, Mexico, USA
Yinfang Lin , Freescale Semiconductor Ltd., China, Mexico, USA
Noah Bamford , Freescale Semiconductor Ltd., China, Mexico, USA
pp. 52-60
Section 3: Architectural and Design Issues

Workload Slicing for Characterizing New Features in High Performance Microprocessors (Abstract)

Hassan Al-Sukhni , Freescale Semiconductor, Inc., USA
David Lindberg , Freescale Semiconductor, Inc., USA
Michele Reese , Freescale Semiconductor, Inc., USA
James Holt , Freescale Semiconductor, Inc., USA
pp. 61-67

Deep vs. Shallow, Kernel vs. Language--What is Better for Heterogeneous Modeling in SystemC? (Abstract)

Hiren D. Patel , Virginia Polytechnic Institute and State University, USA
Sandeep K. Shukla , Virginia Polytechnic Institute and State University, USA
pp. 68-75
Section 4: Design Error Debug & Diagnosis

Debug Support for Scalable System-on-Chip (Abstract)

Ming Yan , National University of Defense Technology, China
Sikun Li , National University of Defense Technology, China
Jianmin Zhang , National University of Defense Technology, China
pp. 83-87

Abstraction and Refinement Techniques in Automated Design Debugging (Abstract)

Sean Safarpour , University of Toronto, Canada
Andreas Veneris , University of Toronto, Canada
pp. 88-93

Diagnosing Silicon Failures Based on Functional Test Patterns (Abstract)

Chia-Chih Yen , Springsoft, Inc., Taiwan
Ten Lin , Springsoft, Inc., Taiwan
Yu-Chin Hsu , Novas Software, Inc., USA
Hermes Lin , Springsoft, Inc., Taiwan
Tayung Liu , Novas Software, Inc., USA
Kai Yang , Novas Software, Inc., USA
pp. 94-98
Author Index

Author Index (PDF)

pp. 99
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