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Microelectronics for Neural Networks and Fuzzy Systems, International Conference on/Microelectronics for Neural, Fuzzy, and Bio-Inspired Systems, International Conference on (1996)
Lausanne, SWITZERLAND
Feb. 12, 1996 to Feb. 14, 1996
ISSN: 1086-1947
ISBN: 0-8186-7373-7
pp: 330
Steven Pigeon , Universite de Montreal
Patrice Y. Simard , AT&T Bell Laboratories
Eric Cosatto , AT&T Bell Laboratories
Jocelyn Cloutier , Universite de Montreal
Francois R. Boyer , Universite de Montreal
ABSTRACT
We present in this paper the architecture and implementation of the Virtual Image Processor (VIP) which is an SIMD multiprocessor build with large FPGAs. The SIMD architecture , together with a 2D torus connection topology, is well suited for image processing, pattern recognition and neural network algorithms. The VIP board can be programmed on-line at the logic level, allowing optimal hardware dedication to any given algorithm.
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CITATION
Steven Pigeon, Patrice Y. Simard, Eric Cosatto, Jocelyn Cloutier, Francois R. Boyer, "VIP: An FPGA-based Processor for Image Processing and Neural Networks", Microelectronics for Neural Networks and Fuzzy Systems, International Conference on/Microelectronics for Neural, Fuzzy, and Bio-Inspired Systems, International Conference on, vol. 00, no. , pp. 330, 1996, doi:10.1109/MNNFS.1996.493811
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