The Community for Technology Leaders
2012 45th Annual IEEE/ACM International Symposium on Microarchitecture (1996)
Paris, FRANCE
Dec. 2, 1996 to Dec. 4, 1996
ISSN: 1072-4451
ISBN: 0-8186-7641-8
TABLE OF CONTENTS

Preface (PDF)

pp. viii

Referees (PDF)

pp. xi
Session 1

A persistent rescheduled-page cache for low overhead object code compatibility in VLIW architectures (Abstract)

S.W. Sathaye , Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
S. Banerjia , Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
T.M. Conte , Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
pp. 4

Integrating a misprediction recovery cache (MRC) into a superscalar pipeline (Abstract)

A.K. Nanda , Semicond. Group, Texas Instrum. Inc., Dallas, TX, USA
S. Dutta , Semicond. Group, Texas Instrum. Inc., Dallas, TX, USA
J.O. Bondi , Semicond. Group, Texas Instrum. Inc., Dallas, TX, USA
pp. 14

Trace Cache: a Low Latency Approach to High Bandwidth Instruction Fetching (Abstract)

Jim Smith , University of Wisconsin - Madison
Eric Rotenberg , University of Wisconsin - Madison
Steve Bennett , Intel Corporation
pp. 24
Session 2

Accurate and Practical Profile-Driven Compilation Using the Profile Buffer (Abstract)

Thomas M. Conte , North Carolina State University
Kishore N. Menezes , North Carolina State University
Mary Ann Hirsch , North Carolina State University
pp. 36

Profile-driven instruction level parallel scheduling with application to super blocks (Abstract)

B. Natarajan , Dept. of Comput. Sci., Stanford Univ., CA, USA
C. Chekuri , Dept. of Comput. Sci., Stanford Univ., CA, USA
B.R. Rau , Dept. of Comput. Sci., Stanford Univ., CA, USA
R. Johnson , Dept. of Comput. Sci., Stanford Univ., CA, USA
R. Motwani , Dept. of Comput. Sci., Stanford Univ., CA, USA
M. Schlansker , Dept. of Comput. Sci., Stanford Univ., CA, USA
pp. 58
Session 3

Hot Cold Optimization of Large Windows/NT Applications (Abstract)

P. Geoffrey Lowney , Digital Equipment Corporation
Robert Cohn , Digital Equipment Corporation
pp. 80

Java Bytecode to Native Code Translation: The Caffeine Prototype and Preliminary Results (Abstract)

Cheng-Hsueh A. Hsieh , University of Illinois at Urbana-Champaign
John C. Gyllenhaal , University of Illinois at Urbana-Champaign
Wen-mei W. Hwu , University of Illinois at Urbana-Champaign
pp. 90
Session 4

Analysis techniques for predicated code (Abstract)

M. Schlansker , Hewlett-Packard Co., Palo Alto, CA, USA
R. Johnson , Hewlett-Packard Co., Palo Alto, CA, USA
pp. 100

Global Predicate Analysis and its Application to Register Allocation (Abstract)

Michael Schlansker , Hewlett Packard
Dz-ching Roy Ju , Hewlett Packard
Richard Johnson , Hewlett Packard
David M. Gillies , Hewlett Packard
pp. 114

Modulo Scheduling of Loops in Control-Intensive Non-Numeric Programs (Abstract)

Wen-mei W. Hwu , University of Illinois at Urbana-Champaign
Daniel M. Lavery , University of Illinois at Urbana-Champaign
pp. 126
Session 5

Assigning confidence to conditional branch predictions (Abstract)

E. Jacobsen , Wisconsin Univ., Madison, WI, USA
E. Rotenberg , Wisconsin Univ., Madison, WI, USA
J.E. Smith , Wisconsin Univ., Madison, WI, USA
pp. 142

Compiler Synthesized Dynamic Branch Prediction (Abstract)

Scott Mahlke , Hewlett-Packard Laboratories
Balas Natarajan , Hewlett-Packard Laboratories
pp. 153

Wrong-Path Instruction Prefetching (Abstract)

Jim Pierce , Intel Corporation
Trevor Mudge , University of Michigan
pp. 165
Session 6

Design decisions influencing the UltraSPARC's instruction fetch architecture (Abstract)

R. Yung , Sun Microsystems Labs., Sun Microsystems Inc., USA
pp. 178

Instruction fetch mechanisms for VLIW architectures with compressed encodings (Abstract)

K.N. Menezes , Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
S. Banerjia , Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
S.Y. Larin , Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
T.M. Conte , Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
S.W. Sathaye , Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
pp. 201
Session 7

Tango: a hardware-based data prefetching technique for superscalar processors (Abstract)

A. Yoaz , IBM Sci. & Technol., MATAM Adv. Technol. Center, Haifa, Israel
S.S. Pinter , IBM Sci. & Technol., MATAM Adv. Technol. Center, Haifa, Israel
pp. 214

Exceeding the Dataflow Limit via Value Prediction (Abstract)

John Paul Shen , Carnegie Mellon University
Mikko H. Lipasti , Carnegie Mellon University
pp. 226

The performance potential of data dependence speculation and collapsing (Abstract)

Y. Sazeides , Dept. of Electr. & Comput. Eng., Wisconsin Univ., Madison, WI, USA
S. Vassiliadis , Dept. of Electr. & Comput. Eng., Wisconsin Univ., Madison, WI, USA
J.E. Smith , Dept. of Electr. & Comput. Eng., Wisconsin Univ., Madison, WI, USA
pp. 238
Session 8

Heuristics for Register-constrained Software Pipelining (Abstract)

Josep Llosa , Universitat Politecnica de Catalunya
pp. 250

Combining loop transformations considering caches and scheduling (Abstract)

Ding-Kai Chen , Silicon Graphics Comput. Syst., Mountain View, CA, USA
M.E. Wolf , Silicon Graphics Comput. Syst., Mountain View, CA, USA
D.E. Maydan , Silicon Graphics Comput. Syst., Mountain View, CA, USA
pp. 274
Session 9

Instruction Scheduling and Executable Editing (Abstract)

James R. Larus , University of Wisconsin?Madison
Eric Schnarr , University of Wisconsin?Madison
pp. 288

Instruction scheduling for the HP PA-8000 (Abstract)

D.A. Dunn , Hewlett-Packard Co., USA
Wei-Chung Hsu , Hewlett-Packard Co., USA
pp. 298

Meld Scheduling: Relaxing Scheduling Constraints across Region Boundaries (Abstract)

Vinod Kathail , Hewlett-Packard Laboratories,
Brian L. Deitrich , University of Illinois
Santosh G. Abraham , Hewlett-Packard Laboratories,
pp. 308
Session 10

Custom--Fit Processors: Letting Applications Define Architectures (Abstract)

Joseph A. Fisher , Hewlett-Packard Laboratories
Paolo Faraboschi , Hewlett-Packard Laboratories
Giuseppe Desoli , Hewlett-Packard Laboratories
pp. 324

Author Index (PDF)

pp. 359
122 ms
(Ver 3.3 (11022016))