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Proceedings. Sixth International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (Cat. No.98TB100247) (1998)
Montreal, Canada
July 19, 1998 to July 24, 1998
ISBN: 0-8186-8566-2
pp: 185
ABSTRACT
In developing a simulator for a new processor architecture, it often is not clear whether it is more efficient to write a new simulator or to modify an existing simulator. Writing a new simulator forces the processor architect to develop or adapt all of the related software tools. However, Modifying an existing simulator and related tools, which are usually not well-documented, can be time-consuming and error-prone. We describe the {\it SImulator for Multithreaded Computer Architectures} (SIMCA) that was developed with the primary goal of obtaining a functional simulator as quickly as possible to begin evaluating the superthreaded architecture. The performance of the simulator itself was important, but secondary. We achieved our goal using a technique called {\it process-pipelining} that exploits the unique features of this new architecture to hide the details of the underlying simulator. This approach allowed us to quickly produce a functional simulator whose performance is only 3.8 - 4.9 times slower than the base simulator. The optimized simulator based on this work was produced quickly wth little effort.
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CITATION

D. Lilja and J. Huang, "An Efficient Strategy for Developing a Simulator for a Novel Concurrent Multithreaded Processor Architecture," Proceedings. Sixth International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (Cat. No.98TB100247)(MASCOTS), Montreal, Canada, 1998, pp. 185.
doi:10.1109/MASCOT.1998.693693
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