Performance Modeling and Measurement of Parallelized Code for Distributed Shared Memory Multiprocessors
2012 IEEE 20th International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (1998)
July 19, 1998 to July 24, 1998
Abdul Waheed , MRJ Technology Solutions
Jerry Yan , MRJ Technology Solutions
This paper presents a model to evaluate the performance and overhead of parallelizing sequential code using compiler directives for multiprocessing on distributed shared memory (DSM) systems. We parallelized the sequential implementation of NAS benchmarks using native Fortran77 compiler directives on an Origin2000, which is a DSM system. We report measurement based performance of these parallelized benchmarks from four perspectives: efficacy of parallelization process; scalability; parallelization overhead; and comparison with hand-parallelized and -optimized version of the same benchmarks. Our results indicate that sequential programs can conveniently be parallelized for DSM systems using compiler directives but realizing performance gains as predicted by the performance model depends primarily on minimizing architecture- specific data locality overhead.
Performance modeling; performance measurement; parallelization; shared memory multiprocessors; and cache performance
Abdul Waheed, Jerry Yan, "Performance Modeling and Measurement of Parallelized Code for Distributed Shared Memory Multiprocessors", 2012 IEEE 20th International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems, vol. 00, no. , pp. 161, 1998, doi:10.1109/MASCOT.1998.693690