The Community for Technology Leaders
2009 10th Latin American Test Workshop (2009)
Buzios, Rio de Janeiro Brazil
Mar. 2, 2009 to Mar. 5, 2009
ISBN: 978-1-4244-4207-2
TABLE OF CONTENTS

Exploring machine learning techniques for fault localization (PDF)

Luciano C. Ascari , Federal University of Parana (UFPR), Computer Science Department, CP: 19081, CEP 19031-970, Centro Politecnico, Jardim das Americas, Curitiba- Brazil
Lucilia Y. Araki , Federal University of Parana (UFPR), Computer Science Department, CP: 19081, CEP 19031-970, Centro Politecnico, Jardim das Americas, Curitiba- Brazil
Aurora R.T. Pozo , Federal University of Parana (UFPR), Computer Science Department, CP: 19081, CEP 19031-970, Centro Politecnico, Jardim das Americas, Curitiba- Brazil
Silvia R. Vergilio , Federal University of Parana (UFPR), Computer Science Department, CP: 19081, CEP 19031-970, Centro Politecnico, Jardim das Americas, Curitiba- Brazil
pp. 1-6

On the derivation of a minimum test set in high quality transition testing (PDF)

Tsuyoshi Iwagaki , Japan Advanced Institute of Science and Technology (JAIST), Ishikawa 923-1292, Japan
Mineo Kaneko , Japan Advanced Institute of Science and Technology (JAIST), Ishikawa 923-1292, Japan
pp. 1-6

Pruning single event upset faults with petri nets (PDF)

P. Maistri , TIMA Laboratory (Grenoble INP, UJF, CNRS), 46 Avenue Félix Viallet - 38031 Grenoble Cedex - France
pp. 1-6

Mutation based testing of Web Services (PDF)

Andre Luiz da Silva Solino , Computer Science Department, Federal University of Paraná (UFPR), CP: 19081, CEP: 81531-970, Curitiba, PR, Brazil
Silvia Regina Vergilio , Computer Science Department, Federal University of Paraná (UFPR), CP: 19081, CEP: 81531-970, Curitiba, PR, Brazil
pp. 1-6

Adaptive position digital control with deadbeat response for a platform on a mobile vehicle (PDF)

H.R. Chamorro , Alternative Energy Sources Research Laboratory (LIFAE), Faculty of Engineering, Universidad Distrital, Bogotá, Colombia
pp. 1-6

A practical methodology for experimental fault injection to test complex network-based systems (PDF)

Cristina C. Menegotto , Instituto de Informática - Universidade Federal do Rio Grande do Sul (UFRGS), Caixa Postal 15.064 - 91.501-970 - Porto Alegre - RS - Brazil
Taisy S. Weber , Instituto de Informática - Universidade Federal do Rio Grande do Sul (UFRGS), Caixa Postal 15.064 - 91.501-970 - Porto Alegre - RS - Brazil
Raul F. Weber , Instituto de Informática - Universidade Federal do Rio Grande do Sul (UFRGS), Caixa Postal 15.064 - 91.501-970 - Porto Alegre - RS - Brazil
pp. 1-6

Measuring the effectiveness of symmetric and asymmetric transistor sizing for Single Event Transient mitigation in CMOS 90nm technologies (PDF)

Thiago Assis , Universidade Federal do Rio Grande do Sul - UFRGS, Brazil
Fernanda Lima Kastensmidt , Universidade Federal do Rio Grande do Sul - UFRGS, Brazil
Gilson Wirth , Universidade Federal do Rio Grande do Sul - UFRGS, Brazil
Ricardo Reis , Universidade Federal do Rio Grande do Sul - UFRGS, Brazil
pp. 1-6

Using Bulk Built-In Current Sensors and recomputing techniques to mitigate transient faults in microprocessors (PDF)

Franco Leite , Departamento de Engenharia Elétrica, Universidade Federal do Rio Grande do Sul - Porto Alegre - RS, Brazil
Tiago Balen , Departamento de Engenharia Elétrica, Universidade Federal do Rio Grande do Sul - Porto Alegre - RS, Brazil
Marcos Herve , Instituto de Informática, Universidade Federal do Rio Grande do Sul - Porto Alegre - RS, Brazil
Marcelo Lubaszewski , Departamento de Engenharia Elétrica, Universidade Federal do Rio Grande do Sul - Porto Alegre - RS, Brazil
Gilson Wirth , Departamento de Engenharia Elétrica, Universidade Federal do Rio Grande do Sul - Porto Alegre - RS, Brazil
pp. 1-6

Using a two-dimensional fault list for compact Automatic Test Pattern Generation (PDF)

Marc Messing , Institute of Computer Science, University of Bremen, 28359, Germany
Andreas Glowatz , Mentor Graphics Development GmbH, 21079 Hamburg, Germany
Friedrich Hapke , Mentor Graphics Development GmbH, 21079 Hamburg, Germany
Rolf Drechsler , Institute of Computer Science, University of Bremen, 28359, Germany
pp. 1-6

High-Level Decision Diagrams based coverage metrics for verification and test (PDF)

Maksim Jenihhin , Department of Computer Engineering, Tallinn University of Technology, Estonia
Jaan Raik , Department of Computer Engineering, Tallinn University of Technology, Estonia
Anton Chepurov , Department of Computer Engineering, Tallinn University of Technology, Estonia
Uljana Reinsalu , Department of Computer Engineering, Tallinn University of Technology, Estonia
Raimund Ubar , Department of Computer Engineering, Tallinn University of Technology, Estonia
pp. 1-6

Applying FIRMAMENT to test the SCTP communication protocol under network faults (PDF)

Torgan Siqueira , Universidade Federal do Rio Grande do Sul, Caixa Postal 15.064 - 91.501-970 - Porto Alegre - RS - Brazil
Bruno Fiss , Universidade Federal do Rio Grande do Sul, Caixa Postal 15.064 - 91.501-970 - Porto Alegre - RS - Brazil
Raul Weber , Universidade Federal do Rio Grande do Sul, Caixa Postal 15.064 - 91.501-970 - Porto Alegre - RS - Brazil
Sergio Cechin , Universidade Federal do Rio Grande do Sul, Caixa Postal 15.064 - 91.501-970 - Porto Alegre - RS - Brazil
Taisy Weber , Universidade Federal do Rio Grande do Sul, Caixa Postal 15.064 - 91.501-970 - Porto Alegre - RS - Brazil
pp. 1-6

Estimating the quality of Oscillation-Based Test for detecting parametric faults (PDF)

Jose Peralta , Grupo de Estudio en Calidad en Mecatrónica, Universidad Tecnológica Nacional, Argentina
Marcelo Costamagna , Grupo de Estudio en Calidad en Mecatrónica, Universidad Tecnológica Nacional, Argentina
Gabriela Peretti , Grupo de Estudio en Calidad en Mecatrónica, Universidad Tecnológica Nacional, Argentina
Eduardo Romero , Grupo de Estudio en Calidad en Mecatrónica, Universidad Tecnológica Nacional, Argentina
Carlos Marques , Grupo de Desarrollo Electrónico e Instrumental, Universidad Nacional de Córdoba, Argentina
pp. 1-6

NBTI-aware technique for transistor sizing of high-performance CMOS gates (PDF)

Mauricio B. da Silva , Universidade Federal do Rio Grande do Sul - UFRGS, Porto Alegre, Brazil
Vinicius V. A. Camargo , Universidade Federal do Rio Grande do Sul - UFRGS, Porto Alegre, Brazil
Lucas Brusamarello , Universidade Federal do Rio Grande do Sul - UFRGS, Porto Alegre, Brazil
Gilson I. Wirth , Universidade Federal do Rio Grande do Sul - UFRGS, Porto Alegre, Brazil
Roberto da Silva , Universidade Federal do Rio Grande do Sul - UFRGS, Porto Alegre, Brazil
pp. 1-5

Minimization of incompletely specified finite state machines based on distinction graphs (PDF)

Alex Alberto , Instituto de Ciências Matemáticas e Computação, Universidade de São Paulo, Caixa Postal: 668 - CEP: 13560-970, São Carlos, Brazil
Adenilso Simao , Instituto de Ciências Matemáticas e Computação, Universidade de São Paulo, Caixa Postal: 668 - CEP: 13560-970, São Carlos, Brazil
pp. 1-6

Study of SEU effects in a Turbo Decoder Bit Error Rate (PDF)

M. Portela-Garcia , Electronic Technology Department, Carlos III University of Madrid (Spain)
M. Garcia-Valderas , Electronic Technology Department, Carlos III University of Madrid (Spain)
C. Lopez-Ongil , Electronic Technology Department, Carlos III University of Madrid (Spain)
L. Entrena , Electronic Technology Department, Carlos III University of Madrid (Spain)
B. Lestriez , VLSI Group of Thales Alenia Space Spain
L. Berrojo , VLSI Group of Thales Alenia Space Spain
pp. 1-5

On-line test and monitoring of multi-processor SoCs: A software-based approach (PDF)

Mounir Benabdenbi , University Pierre and Marie Curie (UPMC), LIP6 Laboratory, SoC department, France
Francois Pecheux , University Pierre and Marie Curie (UPMC), LIP6 Laboratory, SoC department, France
Etienne Faure , University Pierre and Marie Curie (UPMC), LIP6 Laboratory, SoC department, France
pp. 1-6

Turning JTAG inside out for fast extended test access (PDF)

Sergei Devadze , Testonica Lab OÜ, Tallinn, Estonia
Artur Jutman , Testonica Lab OÜ, Tallinn, Estonia
Igor Aleksejev , Tallinn Univ. of Technology, Dept. of Comp. Engineering, Raja 15, 12618, Estonia
Raimund Ubar , Tallinn Univ. of Technology, Dept. of Comp. Engineering, Raja 15, 12618, Estonia
pp. 1-6

Analog test bus architecture for small die size and limited pin count devices with internal IPs testability emphasis (PDF)

E. R. da Silva , Freescale Semiconductor, USA
F. Costa , Freescale Semiconductor, USA
F. H. Behrens , Freescale Semiconductor, USA
R. S. Kickhofel , Freescale Semiconductor, USA
R. Maltione , Freescale Semiconductor, USA
pp. 1-6

NoC interconnection functional testing: Using boundary-scan to reduce the overall testing time (PDF)

Marcos B. Herve , PGMicro -Programa de Pós-Graduação em Microeletrônica, PPGC - Instituto de Informática, Universidade Federal do Rio Grande do Sul, Av. Bento Gonçalves, 9500 - Bloco IV ZIP 91501-970, Porto Alegre - RS, Brazil
Erika Cota , PGMicro -Programa de Pós-Graduação em Microeletrônica, PPGC - Instituto de Informática, Universidade Federal do Rio Grande do Sul, Av. Bento Gonçalves, 9500 - Bloco IV ZIP 91501-970, Porto Alegre - RS, Brazil
Fernanda L. Kastensmidt , PGMicro -Programa de Pós-Graduação em Microeletrônica, PPGC - Instituto de Informática, Universidade Federal do Rio Grande do Sul, Av. Bento Gonçalves, 9500 - Bloco IV ZIP 91501-970, Porto Alegre - RS, Brazil
Marcelo Lubaszewski , PGMicro -Programa de Pós-Graduação em Microeletrônica, PPGC - Instituto de Informática, Universidade Federal do Rio Grande do Sul, Av. Bento Gonçalves, 9500 - Bloco IV ZIP 91501-970, Porto Alegre - RS, Brazil
pp. 1-6

Measurement and control for risk-based test cases and activities (PDF)

Ellen Souza , Department of Systems and Computing at Pernambuco University, Rua Benfica, 455, Madalena, 50750-410, Recife - PE, Brasil
Cristine Gusmao , Department of Systems and Computing at Pernambuco University, Rua Benfica, 455, Madalena, 50750-410, Recife - PE, Brasil
Keldjan Alves , Department of Systems and Computing at Pernambuco University, Rua Benfica, 455, Madalena, 50750-410, Recife - PE, Brasil
Julio Venancio , Department of Systems and Computing at Pernambuco University, Rua Benfica, 455, Madalena, 50750-410, Recife - PE, Brasil
Renata Melo , Department of Systems and Computing at Pernambuco University, Rua Benfica, 455, Madalena, 50750-410, Recife - PE, Brasil
pp. 1-6

Study of radiation effects on PIN photodiodes with deep-trap levels using computer modeling (PDF)

M.A. Cappelletti , Grupo de Estudio de Materiales y Dispositivos Electrónicos (GEMyDE), Depto. Electrotecnia, Facultad de Ingeniería, Universidad Nacional de La Plata, Argentina
A.P. Cedola , Grupo de Estudio de Materiales y Dispositivos Electrónicos (GEMyDE), Depto. Electrotecnia, Facultad de Ingeniería, Universidad Nacional de La Plata, Argentina
S. Baron , Grupo de Estudio de Materiales y Dispositivos Electrónicos (GEMyDE), Depto. Electrotecnia, Facultad de Ingeniería, Universidad Nacional de La Plata, Argentina
G. Casas , Grupo de Estudio de Materiales y Dispositivos Electrónicos (GEMyDE), Depto. Electrotecnia, Facultad de Ingeniería, Universidad Nacional de La Plata, Argentina
E.L. Peltzer y Blanca , Grupo de Estudio de Materiales y Dispositivos Electrónicos (GEMyDE), Depto. Electrotecnia, Facultad de Ingeniería, Universidad Nacional de La Plata, Argentina
pp. 1-6

Testing requirements for an embedded operating system: The exception handling case study (PDF)

Lucieli Tolfo Beque , PPGC - Instituto de Informática, Universidade Federal do Rio Grande do Sul, Av. Bento Gonçalves, 9500 - Bloco IV ZIP 91501-970, Porto Alegre - RS, Brazil
Thiago Dai Pra , PPGC - Instituto de Informática, Universidade Federal do Rio Grande do Sul, Av. Bento Gonçalves, 9500 - Bloco IV ZIP 91501-970, Porto Alegre - RS, Brazil
Erika Cota , PPGC - Instituto de Informática, Universidade Federal do Rio Grande do Sul, Av. Bento Gonçalves, 9500 - Bloco IV ZIP 91501-970, Porto Alegre - RS, Brazil
pp. 1-6

Analyzing structure-based techniques for test coverage on a J2ME software product line (PDF)

Liana Silva , Department of Computing and Systems - University of Pernambuco, R. Benfica, n. 455 - 50.720-001 - Recife - PE - Brazil
Sergio Soares , Department of Computing and Systems - University of Pernambuco, R. Benfica, n. 455 - 50.720-001 - Recife - PE - Brazil
pp. 1-6

Investigations of the diagnosibility of digital networks with BIST (PDF)

Raimund Ubar , Department of Computer Engineering, TTU, Ehitajate tee 5, 19086 Tallinn, Estonia
Sergei Kostin , Department of Computer Engineering, TTU, Ehitajate tee 5, 19086 Tallinn, Estonia
Jaan Raik , Department of Computer Engineering, TTU, Ehitajate tee 5, 19086 Tallinn, Estonia
pp. 1-6

A method for HW functional verification through HW/SW co-simulation in complex systems: H.264/AVC decoder as case study (PDF)

Dieison Antonello Depra , Federal University of Rio Grande do Sul (UFRGS), Informatics Institute - PGMICRO - PPGC, Porto Alegre - RS - Brazil
Bruno Zatt , Federal University of Rio Grande do Sul (UFRGS), Informatics Institute - PGMICRO - PPGC, Porto Alegre - RS - Brazil
Sergio Bampi , Federal University of Rio Grande do Sul (UFRGS), Informatics Institute - PGMICRO - PPGC, Porto Alegre - RS - Brazil
pp. 1-6

Fault tolerance assessment of PIC microcontroller based on fault injection (PDF)

Ashkan Eghbal , Department of Computer Engineering and Information Technology, Amirkabir University of Technology, Iran
Hamid R. Zarandi , Department of Computer Engineering and Information Technology, Amirkabir University of Technology, Iran
Pooria M. Yaghini , Department of Computer Engineering and Information Technology, Amirkabir University of Technology, Iran
pp. 1-6

Generating non-uniform distributions for fault injection to emulate real network behavior in test campaigns (PDF)

Taisy Silva Weber , Universidade Federal do Rio Grande do Sul, Brazil
Juliano Cardoso Vacaro , Universidade Federal do Rio Grande do Sul, Brazil
Torgan Flores de Siqueira , Universidade Federal do Rio Grande do Sul, Brazil
Ingrid Jansch-Porto , Universidade Federal do Rio Grande do Sul, Brazil
pp. 1-6

BugTracer: A system for integrated circuit development tracking and statistics retrieval (PDF)

Thiago Nunes Coelho Cardoso , Computer Science Department, Universidade Federal de Minas Gerais, Brazil
Jose Augusto Nacif , Computer Science Department, Universidade Federal de Minas Gerais, Brazil
Antonio Otavio Fernandes , Computer Science Department, Universidade Federal de Minas Gerais, Brazil
Claudionor Nunes Coelho , Computer Science Department, Universidade Federal de Minas Gerais, Brazil
pp. 1-4

Radiation damage characterization of digital integrated circuits (PDF)

Santiago Sondon , GISEE, Universidad Nacional del Sur, Alem 1253, Bahía Blanca, Argentina
Pablo Mandolesi , GISEE, Universidad Nacional del Sur, Alem 1253, Bahía Blanca, Argentina
Pedro Julian , GISEE, Universidad Nacional del Sur, Alem 1253, Bahía Blanca, Argentina
Felix Palumbo , Grupo Energía Solar - CAC, Comisión Nacional de Energía Atómica, General Paz 1400, Buenos Aires, Argentina
Martin Alurralde , Grupo Energía Solar - CAC, Comisión Nacional de Energía Atómica, General Paz 1400, Buenos Aires, Argentina
Alberto Filevich , Grupo Energía Solar - CAC, Comisión Nacional de Energía Atómica, General Paz 1400, Buenos Aires, Argentina
pp. 1-5

Single element correction in sorting algorithms with minimum delay overhead (PDF)

Costas A. Argyrides , Department of Computer Science of the University of Bristol, UK
Carlos A. Lisboa , Instituto de Informatica, Universidade Federal do Rio Grande do Sul, Brazil
Dhiraj K. Pradhan , Department of Computer Science of the University of Bristol, UK
Luigi Carro , Instituto de Informatica, Universidade Federal do Rio Grande do Sul, Brazil
pp. 1-6

Using software invariants for dynamic detection of transient errors (PDF)

Carlos Arthur Lisboa , Instituto de Informatica, PPGC, Universidade Federal do Rio Grande do Sul, Brazil
Carmela Grando , Instituto de Informatica, PPGC, Universidade Federal do Rio Grande do Sul, Brazil
Alvaro de Freitas Moreira , Instituto de Informatica, PPGC, Universidade Federal do Rio Grande do Sul, Brazil
Luigi Carro , Instituto de Informatica, PPGC, Universidade Federal do Rio Grande do Sul, Brazil
pp. 1-6

Test and qualification of a Fault Tolerant FPGA based Active Antenna System for space applications (PDF)

Ezequiel Brac , Universidad Nacional de Córdoba, Argentina
Pablo Ferreyra , Universidad Nacional de Córdoba, Argentina
Raoul Velazco , Laboratoire TIMA, Grenoble, France
Carlos Marques , Universidad Nacional de Córdoba, Argentina
pp. 1-5

A case study for Formal Verification of a timing co-processor (PDF)

Cristiano Rodrigues , Brazil Semiconductor Technology Center (BSTC) - Freescale Semiconductor Inc., Brazil
pp. 1-6

Recovery scheme for hardening system on programmable chips (PDF)

Cristina Meinhardt , UFRGS, Brazil
Ricardo Reis , UFRGS, Brazil
Massimo Violante , Politecnico di Torino, Italy
Matteo Sonza Reorda , Politecnico di Torino, Italy
pp. 1-6

Measuring clock-signal modulation efficiency for Systems-on-Chip in electromagnetic interference environment (Abstract)

M. Santos , IST / INESC-ID Lisboa, Lisbon
J. Semiao , UAlg / EST, Univ. of Algarve, Faro
M. Moraes , Electr. Eng. Dept., PUCRS, Porto Alegre
M. Mallmann , Electr. Eng. Dept., PUCRS, Porto Alegre
C. Antunes , Electr. Eng. Dept., PUCRS, Porto Alegre
J. Benfica , Electr. Eng. Dept., PUCRS, Porto Alegre
F. Vargas , Electr. Eng. Dept., PUCRS, Porto Alegre
J. Freijedo , IST / INESC-ID Lisboa, Lisbon
I.C. Teixeira , IST / INESC-ID Lisboa, Lisbon
J.J. Rodnguez Andina , Dept. de Tecnol. Electron., Univ. of Vigo, Vigo
J.P. Teixeira , IST / INESC-ID Lisboa, Lisbon
D. Lupi , Inst. Nac. de Tec. Ind., Buenos Aires
E. Gatti , Inst. Nac. de Tec. Ind., Buenos Aires
L. Garcia , Inst. Nac. de Tec. Ind., Buenos Aires
F. Hernandez , Univ. ORT, Montevideo
pp. 1-6

A modern look at the CMOS stuck-open fault (PDF)

Roberto Gomez , Dept. Electronic Engineering, National Institute for Astrophysics, Optics, and Electronics -INAOE, Puebla, Mexico
Victor Champac , Dept. Electronic Engineering, National Institute for Astrophysics, Optics, and Electronics -INAOE, Puebla, Mexico
Chuck Hawkins , ECE Dept., University of New Mexico, Albuquerque, USA
Jaume Segura , University of Balearic Islands, Mallorca, Spain
pp. 1-6

Execution time reduction of Differential Power Analysis experiments (PDF)

Giorgio Di Natale , Laboratoire d'Informatique, de Robotique et de Microélectronique de Montpellier, Université Montpellier II / CNRS UMR 5506, 161 rue Ada, 34392 Cedex 5, France
Marie-Lise Flottes , Laboratoire d'Informatique, de Robotique et de Microélectronique de Montpellier, Université Montpellier II / CNRS UMR 5506, 161 rue Ada, 34392 Cedex 5, France
Bruno Rouzeyre , Laboratoire d'Informatique, de Robotique et de Microélectronique de Montpellier, Université Montpellier II / CNRS UMR 5506, 161 rue Ada, 34392 Cedex 5, France
pp. 1-5

Using mixed-mode test bus architecture to RF-based fault injection analysis and EMC fault debug (PDF)

E. R. da Silva , Freescale Semiconductor, USA
F. Costa , Freescale Semiconductor, USA
F. H. Behrens , Freescale Semiconductor, USA
R. S. Kickhofel , Freescale Semiconductor, USA
R. Maltione , Freescale Semiconductor, USA
pp. 1-6
89 ms
(Ver 3.3 (11022016))