The Community for Technology Leaders
2013 IEEE International Test Conference (ITC) (2003)
Charlotte, NC, USA
Sept. 30, 2003 to Oct. 2, 2003
ISSN: 1089-3539
ISBN: 0-7803-8107-6
pp: 431
A. Paschalis , University of Athens, Greece
D. Gizopoulos , University of Piraeus, Greece
Y. Zorian , Virage Logic, Fremont, CA
G. Xenoulis , University of Piraeus, Greece
N. Kranitis , University of Athens, Greece
ABSTRACT
Embedded processor testing techniques based on the execution of self-test routines, have been recently proposed as an effective alternative to classical hardware Built-In Self Test. Software-based self-testing provides at-speed testing capability and does not add hardware or performance penalties. It efficiently partitions the testing task between external testers and internal processor resources.<div></div> In this paper we analyze the application of a software-based self-testing methodology to different implementations of a complex embedded processor architecture. We demonstrate that such a methodology provides high test quality in different processor implementations with low test development and low test application costs.
INDEX TERMS
null
CITATION
A. Paschalis, D. Gizopoulos, Y. Zorian, G. Xenoulis, N. Kranitis, "Application and Analysis of RT-Level Software-Based Self-Testing for Embedded Processor Cores", 2013 IEEE International Test Conference (ITC), vol. 00, no. , pp. 431, 2003, doi:10.1109/TEST.2003.1270868
80 ms
(Ver 3.3 (11022016))